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Featured Vendor

IMMS GmbH

Germany

Design, verification, and test of analog, digital, and mixed-signal ICs. Specialized in biomedical and optical applications. Premium partner of X-FAB.

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FortifyIQ

USA

FortifyIQ offers: a comprehensive software suite needed for detection and remediation of side-channel threats at the pre-silicon stage
and IP Cores resistant to side-channel attacks.

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VeriSilicon

USA

“SiPaaS” IP & ASIC solutions including licensable GPU, video, audio, AI/ML-NPU, ISP, compression, security, power, RF, mixed-signal and advanced packaging.

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AEMtec

Germany

AEMtec is the Strategic Technology Partner for advanced Microsystems, Opto-Electronics, Wafer back-end and Packaging Services.

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iSine

USA

iSine was founded in 1981 to provide ASIC design, development and manufacturing solutions. Patented LED ballast chips are in production.

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Racyics

Racyics

Germany

Racyics is an experienced integrated circuit design service provider and GLOBALFOUNDRIES channel partner with focus on advanced semiconductor nodes.

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Semiconductor News

CEO Talk: Mayank Varshney, VP of Engineering, Mirafra Inc

CEO Talk: Mayank Varshney, VP of Engineering, Mirafra Inc

IC Package Types and How to Choose One?

IC Package Types and How to Choose One?

CEO Talk: Bram De Muer of ICsense

CEO Talk: Bram De Muer of ICsense

Multi Project Wafer (MPW) Service and Price

Multi Project Wafer (MPW) Service and Price

VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification

VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification

What does a VLSI Engineer do?

What does a VLSI Engineer do?

What is an ASIC Engineer?

What is an ASIC Engineer?

ASIC Design: From Spec to Chips

ASIC Design: From Spec to Chips

Latest Articles

ASIC Design

CEO Talk: Mayank Varshney, VP of Engineering, Mirafra Inc

CEO Talk: Mayank Varshney, VP of Engineering, Mirafra Inc

CEO Talk: Bram De Muer of ICsense

CEO Talk: Bram De Muer of ICsense

What does a VLSI Engineer do?

What does a VLSI Engineer do?

IP Cores

VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification

VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification

QuickLogic Signs 7-Figure eFPGA IP Contract for GlobalFoundries’ 12LP Process

QuickLogic Signs 7-Figure eFPGA IP Contract for GlobalFoundries’ 12LP Process

Noesis Technologies releases its Ultra High Speed FFT/IFFT processor IP Core

Noesis Technologies releases its Ultra High Speed FFT/IFFT processor IP Core

ASIC Industry Market Trends

Introduction to eDRAM

Introduction to eDRAM

CEO Talk: Michael Dube, EVP at Rochester Electronics

CEO Talk: Michael Dube, EVP at Rochester Electronics

HaiLa Technologies Showcases First Wi-Fi-based Extreme-low-power Backscatter Chip, Developed in Partnership with Presto Engineering

HaiLa Technologies Showcases First Wi-Fi-based Extreme-low-power Backscatter Chip, Developed in Partnership with Presto Engineering

Wafer and Foundries

Multi Project Wafer (MPW) Service and Price

Multi Project Wafer (MPW) Service and Price

Global Top 10 Foundries Q4 Revenue Up 7.9%, Annual Total Hits US$111.54 Billion in 2023

Global Top 10 Foundries Q4 Revenue Up 7.9%, Annual Total Hits US$111.54 Billion in 2023

Semiconductor Foundry Revenue 2023-2024

Semiconductor Foundry Revenue 2023-2024

Packaging

IC Package Types and How to Choose One?

IC Package Types and How to Choose One?

Understanding CoWoS Packaging Technology

Understanding CoWoS Packaging Technology

First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering

First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering

Verification

The Ultimate Guide to ASIC Verification

The Ultimate Guide to ASIC Verification

Sankalp Semiconductor Announces Availability of Automated Analog Validation Services Environment – SAVE

Sankalp Semiconductor Announces Availability of Automated Analog Validation Services Environment – SAVE

Constrained Random Verification flow strategy

Constrained Random Verification flow strategy

Testing

First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering

First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering

Presto and T&W Engineering Announce Long-Term Partnership to Advance Wearable Brain Sensing

Presto and T&W Engineering Announce Long-Term Partnership to Advance Wearable Brain Sensing

Presto Engineering Announces its Collaboration with Nokia as Part of France 2030 Investment Plan

Presto Engineering Announces its Collaboration with Nokia as Part of France 2030 Investment Plan

Qualification

Managing Space Grade RF Device Qualifications

Managing Space Grade RF Device Qualifications

Criteria Labs Expands Manufacturer’s Representatives to Better Serve Customers Throughout the United States and Canada

Criteria Labs Expands Manufacturer’s Representatives to Better Serve Customers Throughout the United States and Canada

Understanding High Temperature Storage Life (HTSL) in IC Qualification

Understanding High Temperature Storage Life (HTSL) in IC Qualification

Supply Chain

CEO Talk: Michael Dube, EVP at Rochester Electronics

CEO Talk: Michael Dube, EVP at Rochester Electronics

The Economics of ASIC

The Economics of ASIC

Obsolete Chips – The Ultimate Guide

Obsolete Chips – The Ultimate Guide

Failure Analysis

FIB Circuit Edit

FIB Circuit Edit

Best Practices: IC Troubleshooting & IC Failure Analysis

Best Practices: IC Troubleshooting & IC Failure Analysis

Focused Ion Beam (FIB)

Focused Ion Beam (FIB)