Monthly Archives: January 2014


Electrostatic Discharge vs Electromigration

This is a guest post by Naman Gupta, a Static Timing Analysis (STA) engineer at a leading semiconductor company in India.

Electrostatic Discharge and Electromigration might sound similar, but refer to two different physical phenomena. Let’s take them up one by one.


Electrostatic Discharge (ESD) is the large current flow between any two points when a large (usually momentarily) potential difference is applied across those two points. In semiconductor terms, let’s say by some means a large potential is applied between the gate and source (typically at ground potential) of the MOS device, it may disrupt the silicon dioxide of the transistor. The silicon dioxide controls the important parameters like the threshold voltage (Vt) of the transistor and any physical damage would impact the functionality of the device and hence that of the entire SoC.


To give you a general perspective:


  • The semiconductor industry incurs losses worth millions of dollars just due to ESD and therefore while shipping the parts, each and every IC is packed with utmost care and insulated from the outside world.


  • Also, while working in the labs in research centers, universities or corporates, care is taken to obviate any excess potential from getting accumulated on any lab equipment. Ideally, there’s should be separate ground for all equipments which may accumulate charge, even if it might be as small as a metallic needle. Even back in my college days, our professor used to admonish us for touching the pins of any IC with bare hands because sufficient potential can get accumulated on our body, specially, our extremities like fingers. Additionally, engineers wear specially designed suits which ensure that any charge created is discharged back to the ground!


  • Expensive chips like FPGAs usually come with an in-built protection in form of diodes with high-surge capability to protect it from ESD.


Note that ESD is a single time event. It can occur maybe while shipping, maybe while you are beginning to use the device or maybe when you are using that device.


Electromigration (EM): Let’s say a device is operating over a long period of time. And there are certain regions in the device, where the current density is pretty high. These electrons have the propensity to displace the atoms of the device and this might create voids in certain regions and hillocks in other regions.

Hillocks can create “shorts” between two metal lines which were otherwise two distinct lines. Voids can create “opens” between two metal lines which were otherwise shorted. Hence it will affect the functionality of the device.


Note that unlike ESD, EM is a gradual phenomenon. It is the main reason you see a dip in the device performance or functional failures in the device when it is operating over a certain period of time.


EM can be mitigated by:

  • Reducing or distributing the current density in the metal lines. Current density can be reduced by increasing the width of the metal interconnects.
  • The wire material also affects the electromigration. For example: copper wires are typically 4-5 times more robust to the deleterious effect of electromigration as compared to the aluminum wires.


To read more blogs from Naman, visit





Foundry Ranking by Capacity 2013-2014

Each year, top foundries are ranked by their sales, and you probably don’t need the table below to know who’s first.

But what if we look at the top foundries from the capacity angle? Each of the top foundries holds several production lines that address different technology nodes and wafer sizes. Naturally, the goal is to sell 100% of the production capacity to reach revenue goals. Consider that increasing production capacity requires huge investments – indicating that a foundry believes in its ability to fulfill the expanded capacity and grow its revenues. So possibly, this could indicate if any of TSMC followers are closing the gap.


top 2012 foundries

Source: IC insights


We took a look at the wafer capacity of four foundries: TSMC, GLOBALFOUNDRIES, UMC and SMIC, based on available data on their website. It would have been interesting to include Samsung’s too, yet data was not available.


Foundry Capacity Comparison

The 2013 capacity of each of the four foundries can be seen in the table and graph below.

Production capacity figures were all converted to 8-inch equivalent wafers in order to enable comparison.

 foundries graph



TSMC Foundry Capacity

Total capacity of the manufacturing facilities managed by TSMC, including subsidiaries and joint ventures, reached 16.4 million eight-inch equivalent wafers in 2013. TSMC operates three advanced 12-inch wafer GIGAFAB™ facilities (fab 12, 14 and 15), four eight-inch wafer fabs (fab 3, 5, 6, and 8), and one six-inch wafer fab (fab 2). TSMC also manages two eight-inch fabs at wholly owned subsidiaries: WaferTech in the United States and TSMC China Company Limited, and its joint venture fab; SSMC in Singapore.





GLOBALFOUNDRIES capacity is based on the fabs spread out in the US, Germany and Singapore.




With fab operations in Taiwan, China and Singapore, UMC has 10 fabs targeting 6 inch to 12 inch wafer technology. UMC was the first foundry to produce chips on 12 inch wafers and currently starting production for 28nm technology node.



SMIC is a China based foundry that provides wafer fabrication services on 8 inch and 12 inch wafers at 0.35μm to 45/40nm technology. SMIC’s is operating 4 fabs, 200mm fab in Shanghai (S1) and 300mm fab in Beijing (B1) offer a wide range of manufacturing technologies.