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SYNERGIE CAD PSC

SYNERGIE CAD PSC

France

SEMICONDUCTORS BACK-END SERVICES: IC’s Testing, IC’s Packaging, IC’s qualification-Reliability, IC’s Supply Chain and PCB Design and Fabrication.

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BLR LABS

BLR LABS

India

BLRLABS is a VLSI company. We specialize in SoC Physical Design (RTL-To-GDS2) Turnkey execution, offering Services in RTL design, DFT, Verification in ASIC & FPGA.

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Mirafra

Mirafra

USA

Mirafra is a global Engineering Services company with expertise in Semiconductor Design & Verification, Embedded and Application Software services.

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Riverbeck

Riverbeck

UK

Riverbeck provides turnkey ASIC design and supply solutions, to provide custom integrated circuits where needs or cost demands them.

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Chips&Media

Chips&Media

Korea

Chips&Media is a leading semiconductor HW IP provider specializing in multimedia IPs, video codecs, ISP, and deep learning-based upscaling super-resolution.

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AnalogueSmith

AnalogueSmith

Singapore

We provide RFIC, analogue, and mixed signal ASIC design services focused on IoT sensor node design and other markets.

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Semiconductor News

IC Package Types and How to Choose One?
IC Package Types and How to Choose One?
CEO Talk: Bram De Muer of ICsense
CEO Talk: Bram De Muer of ICsense
Multi Project Wafer (MPW) Service and Price
Multi Project Wafer (MPW) Service and Price
VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
What does a VLSI Engineer do?
What does a VLSI Engineer do?
What is an ASIC Engineer?
What is an ASIC Engineer?
ASIC Design: From Spec to Chips
ASIC Design: From Spec to Chips
Understanding CoWoS Packaging Technology
Understanding CoWoS Packaging Technology

Latest Articles

ASIC Design

CEO Talk: Bram De Muer of ICsense
CEO Talk: Bram De Muer of ICsense
What does a VLSI Engineer do?
What does a VLSI Engineer do?
What is an ASIC Engineer?
What is an ASIC Engineer?

IP Cores

VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
QuickLogic Signs 7-Figure eFPGA IP Contract for GlobalFoundries’ 12LP Process
QuickLogic Signs 7-Figure eFPGA IP Contract for GlobalFoundries’ 12LP Process
Noesis Technologies releases its Ultra High Speed FFT/IFFT processor IP Core
Noesis Technologies releases its Ultra High Speed FFT/IFFT processor IP Core

ASIC Industry Market Trends

Introduction to eDRAM
Introduction to eDRAM
CEO Talk: Michael Dube, EVP at Rochester Electronics
CEO Talk: Michael Dube, EVP at Rochester Electronics
HaiLa Technologies Showcases First Wi-Fi-based Extreme-low-power Backscatter Chip, Developed in Partnership with Presto Engineering
HaiLa Technologies Showcases First Wi-Fi-based Extreme-low-power Backscatter Chip, Developed in Partnership with Presto Engineering

Wafer and Foundries

Multi Project Wafer (MPW) Service and Price
Multi Project Wafer (MPW) Service and Price
Global Top 10 Foundries Q4 Revenue Up 7.9%, Annual Total Hits US$111.54 Billion in 2023
Global Top 10 Foundries Q4 Revenue Up 7.9%, Annual Total Hits US$111.54 Billion in 2023
Semiconductor Foundry Revenue 2023-2024
Semiconductor Foundry Revenue 2023-2024

Packaging

IC Package Types and How to Choose One?
IC Package Types and How to Choose One?
Understanding CoWoS Packaging Technology
Understanding CoWoS Packaging Technology
First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering
First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering

Verification

The Ultimate Guide to ASIC Verification
The Ultimate Guide to ASIC Verification
Sankalp Semiconductor Announces Availability of Automated Analog Validation Services Environment – SAVE
Sankalp Semiconductor Announces Availability of Automated Analog Validation Services Environment – SAVE
Constrained Random Verification flow strategy
Constrained Random Verification flow strategy

Testing

First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering
First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering
Presto and T&W Engineering Announce Long-Term Partnership to Advance Wearable Brain Sensing
Presto and T&W Engineering Announce Long-Term Partnership to Advance Wearable Brain Sensing
Presto Engineering Announces its Collaboration with Nokia as Part of France 2030 Investment Plan
Presto Engineering Announces its Collaboration with Nokia as Part of France 2030 Investment Plan

Qualification

Managing Space Grade RF Device Qualifications
Managing Space Grade RF Device Qualifications
Criteria Labs Expands Manufacturer’s Representatives to Better Serve Customers Throughout the United States and Canada
Criteria Labs Expands Manufacturer’s Representatives to Better Serve Customers Throughout the United States and Canada
Understanding High Temperature Storage Life (HTSL) in IC Qualification
Understanding High Temperature Storage Life (HTSL) in IC Qualification

Supply Chain

CEO Talk: Michael Dube, EVP at Rochester Electronics
CEO Talk: Michael Dube, EVP at Rochester Electronics
The Economics of ASIC
The Economics of ASIC
Obsolete Chips – The Ultimate Guide
Obsolete Chips – The Ultimate Guide

Failure Analysis

FIB Circuit Edit
FIB Circuit Edit
Best Practices: IC Troubleshooting & IC Failure Analysis
Best Practices: IC Troubleshooting & IC Failure Analysis
Focused Ion Beam (FIB)
Focused Ion Beam (FIB)
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