January 19, 2017, anysilicon
Hsinchu, Taiwan — Jan. 19 2017 — Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, has received the certificate of ISO 26262 (Road vehicles-functional safety) from SGS-TÜV Saar on its design development process. Faraday is the first ASIC design service company in the world approvedRead More
January 17, 2017, anysilicon
eInfochips, a leading Product Engineering and Software R&D services firm, recently announced that the company was rated in the “Leadership Zone” for Semiconductor services by Zinnov, in its annual “Zinnov Zones 2016 PES” ratings. eInfochips was also recognized under “Execution Zone” for Aerospace, Industrial Automation, Medical Devices, and Consumer Software.
December 22, 2016, anysilicon
Leuven, December 20th 2016 – AnSem NV, the leading analog, RF and mixed-signal ASIC solutions company expands its operations, opening an office in Enschede, The Netherlands.
The Dutch design center will be headed by Clemens Mensink, who has over 20 years of IC experience. AnSem BV will be located
December 20, 2016, anysilicon
Belgrade, Serbia – December 20th, 2016 – HDL Design House, a provider of high-performance digital and analog IP cores and system-on-chip (SoC) design and verification services, has joined the ARM® Approved Design Partner program, through which leading SoC design houses are recognized by ARM as accredited partners in specific technologiesRead More
December 12, 2016, anysilicon
It can be asked why design a dual port memory bit? Is this not a case of re-inventing the wheel? Not necessarily. Most memories are designed with speed being the main design goal. You achieve speed by limiting that range of voltages and temperatures that the memory will operate over.Read More
November 28, 2016, anysilicon
This is an interview with Moortec CTO, Oliver King about the thermal issues associated with modern ASICs and ponders the question How Hot is Hot? Oliver has been leading the development of compelling in-chip monitoring solutions to address problems associated with ever-shrinking System-on-Chip (SoC) process geometries. An analogue and mixed signalRead More