Category Archives: ASIC Design

Beyond RTL part 1: High-Level Synthesis

April 13, 2015, anysilicon

ninja-ok

Let’s say for a minute that you believe that it is finally time to drop RTL (maybe it was my previous post that convinced you). What can I say? I’m glad! You now have to pick among several competing technologies, each with its pros and cons, each of course claiming to be the best,

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Corner-based Timing Signoff and What Is Next?

March 23, 2015, anysilicon

signoff

The corner-based timing signoff approach is a historical and traditional method that has justified a development and enhancements of conventional STA tools and signoff flows. The number of signoff corners exponentially grows along with an increase of variation sources, their magnitude, and timing margins. It becomes a bottleneck in

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Wireless Transceivers RF CMOS Front Ends

March 18, 2015, anysilicon

music-music-player-musical-instrument-200px

During the last decades, important advances in microelectronic techniques and technologies had been fueling the introduction of new wireless enabled products accessible to a large number of people around the world. Without the competitive price offered by CMOS, the widespread use of wireless enabled engineering complex devices, e.g. smartphones, tablets, etc. would certainly have been delayed.

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Design-for-Variability and Signoff – Tips

March 12, 2015, anysilicon

tips-from-the-top

The corner-based timing signoff approach is a historical and traditional method that has justified a development and enhancements of conventional STA tools and signoff flows. The number of signoff corners exponentially grows along with an increase of variation sources, their magnitude, and timing margins. It becomes a bottleneck in the

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Switching Noise in Wireless ASIC Applications

March 09, 2015, anysilicon

quiet please

There has been a substantial amount of discussion about the noise of power supplies and its harmful effect inside wireless electronic devices such as cell phones and WiFi or bluetooth enabled portable devices. Due to an increased pressure to extend battery life in portable devices, switching (or DC-DC) regulators have

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The Future of Custom ASICs

March 04, 2015, anysilicon

calculate

For decades, electronics product innovation has been incremental in nature, relying largely on the next generation of semiconductors to deliver performance improvement. For almost 50 years Moore’s Law has delivered 2x performance (power or cost) improvement in semiconductors every 18 months, outpacing any product or system level innovation cycle that

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