Category Archives: IP Cores

Cadence to Expand High-Speed Communications IP Portfolio with Acquisition of nusemi inc

November 20, 2017, anysilicon

news

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that it has acquired nusemi inc, a company focused on the development of ultra-high-speed Serializer/Deserializer (SerDes) communications IP.
 
SerDes solutions enable high-speed communications between chips, backplane and long-haul optical interconnect by converting between parallel data and extremely high-speed serial data streams with

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UltraSoC selected by Microsemi for growing RISC-V product range

November 16, 2017, anysilicon

Microprocessor in hand in front of chip layout

UltraSoC today announced that Microsemi, a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, has licensed UltraSoC’s universal analytics and embedded intelligence platform for use in an expanding range of Microsemi products based on the RISC-V open source processor architecture.
 
This latest engagement for UltraSoC extends

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Open-Silicon Expands Networking IP Portfolio to Address High-Bandwidth Ethernet Endpoint and Ethernet Transport Applications

November 15, 2017, anysilicon

Sprinter leaving starting blocks on the running track. Explosive

Open-Silicon today announced the availability of a comprehensive IP subsystem targeted at high-bandwidth networking applications. The subsystem expands on Open-Silicon’s existing high speed chip-to-chip Interlaken interface IP to include Ethernet Physical Coding Sublayer (PCS), Flex Ethernet (FlexE) and multi-channel multi-rate Forward Error Correction (FEC) IPs targeted for Ethernet endpoint and

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Semiconductor IP (Intellectual Property) Core – An Introduction

November 02, 2017, anysilicon

Examining a microchip

Sometimes called IP core or IP block, semiconductor intellectual property core is an integrated circuit or block, cell, or logic that is reusable that provides a design which is the intellectual property of its creator or party. The term itself comes from the source code copyright or licensing of the

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OmniPHY to Demonstrate Automotive Design Solutions at IEEE-SA Automotive Ethernet Technology Day

October 31, 2017, anysilicon

car

OmniPHY, Inc. OmniPHY Semiconductor, Inc. today announced it will be showcasing how it leverages automotive Ethernet technology to create robust automotive semiconductor IP solutions at the IEEE-SA Automotive Ethernet Technology Day forum. The event is being held on October 31 – November 2, 2017, at the San Jose McEnery Convention

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M31 Technology and Corigine have launched the world’s first USB-IF certified 28nm Superspeed+ USB 3.1 Gen 2 IP Solution

October 20, 2017, anysilicon

usb

M31 Technology Corporation, a global Silicon Intellectual Property (IP) boutique, today announced that Corigine’s USB 3.1 Gen 2 PC host and device controller intellectual property (IP) with M31 28nm PHY is certified by the USB Implementers Forum (USB-IF) and compliant with USB SuperSpeed+, the fastest USB speed standard.
 
USB

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