Category Archives: IP Cores

Amphion Semiconductor releases enhanced ‘Malone’ video decoder IP for SoC implementation

January 19, 2018, anysilicon


Amphion Semiconductor, a leading video codec silicon IP provider, today announced the release of the latest version of its highly successful, ‘Malone’ video decoder IP core optimized for SoC implementation. Architectural optimizations have enabled Amphion’s video SoC experts to realize further reductions in the size of the core area while

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Low Risk Customized IP Core Design

January 17, 2018, anysilicon

computer cpu or central processor unit chip on mainboard.Technology background with computer processors CPU concept and blue circuit, board texture.

In the world of IP core design, there is an inherent conflict: Imagine this – if the IP core is going to be re-used, then should you deliver something that can be customized by the customer to their needs, or should you deliver a solution tailor-made to their exact needs?
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Synopsys Expands DesignWare IP Portfolio with Acquisition of Kilopass Technology

January 11, 2018, anysilicon


Synopsys, Inc. (Nasdaq:SNPS) today announced that it has acquired Kilopass Technology, Inc., a leading provider of antifuse one-time programmable (OTP) non-volatile memory (NVM) IP used in automotive, mobile, industrial, and Internet of Things (IoT) applications. Kilopass Technology’s one-transistor (1T) and two-transistor (2T) bitcell OTP NVM IP complements Synopsys’ existing DesignWare®

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Dolphin Integration paves the way for the next generation of Digital microphones “CoolMic”

January 09, 2018, anysilicon


Voice based interaction with human interface devices is on the rise, especially driven by search through natural language on mobiles, Voice assistants, tablets and so on. For success of these Voice First Devices, being Always-On and consuming ultra low power while delivering high audio performance is both a necessity and

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Moortec Opens New European Design Centre in Poland

January 09, 2018, anysilicon


The brand new facility will be headed up by Moortec Design Centre Manager, Szymon Gerka, with support from Moortec CTO, Oliver King.
Moortec provides compelling embedded IP subsystem solutions for Process, Voltage & Temperature (PVT) monitoring, targeting advanced node CMOS technologies from 40nm down to 7nm.
“The exciting new

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Creonic Launches 5G Product Line with Polar and LDPC FEC IP Cores

December 20, 2017, anysilicon


Creonic GmbH today announced its new product line for 5G FEC (forward error correction). The product line covers LDPC decoder as well as Polar encoder and decoder IP cores for this latest 3GPP specification (3GPP Release 15).
The LDPC core comprises HARQ combining, rate matching, LDPC decoding, and CRC check. It

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