November 25, 2016, anysilicon
Bengaluru(India)- 25th November 2016- Silab Tech today announced that it ranked Number 21st on the Deloitte Technology Fast50 India 2016, a ranking of the 50 fastest growing technology companies in India. Rankings are based on percentage revenue growth over three years. SilabTech grew 236% percent during this period.
November 17, 2016, anysilicon
The semiconductor IP core market has grown dramatically in the last 10 years. There are literally hundreds of IP core suppliers in the market providing almost every possible functionally – from DC/DC and PLLs to Bluetooth and CPU cores. This large number of vendors and IP cores makes the selectionRead More
November 14, 2016, anysilicon
Siemens is further building its Vision 2020 to shape Digital Industrial Enterprise by expanding its unique portfolio for industrial software. Siemens and Mentor Graphics (NASDAQ: MENT) (“Mentor”) today announced that they have entered into a merger agreement under which Siemens will acquire Mentor for $37.25 per share in cash, whichRead More
November 04, 2016, anysilicon
Bengaluru (India) – Oct 25th, 2016 –SilabTech, a leading supplier of high speed serial interface intellectual property designs (IP cores) announced today the release of its High Speed Serial Trace Port (HSSTP) PHY. This IP Core is silicon proven on TSMC 28HPC and was successfully delivered to a Tier-1 globalRead More
November 03, 2016, anysilicon
EVA, Inc. (NASDAQ: CEVA), the leading licensor of signal processing IP cores for smarter, connected devices, today announced Espressif Systems, a leading fabless semiconductor company providing low power wireless solutions for the Internet of Things (IoT) applications has licensed and deployed the RivieraWaves Bluetooth dual mode technology in its new ESP32 chip.
October 28, 2016, anysilicon
I’d like to start by talking about the biggest misconception regarding RISC-V. Many of you who have heard about RISC-V likely believe it is an open-source processor … but it is not.
So what is it?
RISC-V is an open specification of an Instruction Set Architecture (ISA). That is,