April 16, 2015, anysilicon
This is a guest post from Craig MacKenzie, Staff Design Engineer at Nuvation Engineering, provider of complex electronic product development and design services.
With the rapid growth of mobile technology and battery-powered devices, power consumption has become an increasingly important metric for electronic products. Designing low-power systems and devices is particularly difficult due to the complex and numerous hardware and software interactions that need to be considered. When designing a system that requires years of battery life, a good power management plan is necessary. Here are some strategic tips that Nuvation engineers have implemented to successfully design many low-power devices.
The first step in any low power design is to establish the various power states in which the system will operate. In the case of a single MCU design, these could simply map to the power modes listed in the device datasheet. In a system with multiple processors or non-trivial external hardware blocks (radio sub-systems, analog interfaces, etc.) the power states could be a more complicated arrangement of power vs. performance trade-offs at various clock speeds and supply voltages.
Once the system’s power states have been defined it is highly recommended that they be implemented on either prototype hardware or a suitably equipped/modified evaluation platform to verify that the required power consumption is achievable. Depending on system complexity, this could involve anything from updating a few register fields to creating representative CPU processing loads.
The next step is to define the events that cause transitions between power levels on the device. Some typical examples would be an RTC alarm, activity on a communications or user interface, or a measurement threshold being exceeded on a sensor interface.
Once again, it’s a good idea to test these events in isolation to ensure that they function as expected. For example: verify that a system’s RTC alarm correctly wakes the CPU when its clock is gated off, or ensure that any transition latency requirements can be achieved (this is particularly relevant to communications and user interfaces). Discoveries made at this stage are likely to propagate back up to the system design level as timing and stability issues are discovered.
Next, think about how transitions between power states will be managed. In a single-threaded application this could consist of a set of stand-alone function calls made in appropriate places. In a multi-threaded environment with many independent tasks, some mechanism for arbitrating power requirements between tasks needs to be implemented. Often it is easiest to implement transition management as a logic-only process at an “everything on” power state before introducing hardware state transitions, since normal debug infrastructure may be unavailable due to gated clocks and disabled hardware.
Once all the building blocks are in place, it’s necessary to verify that the power consumption meets the overall requirements of the design. Making use of automated unit tests (a subject for another article) will make life significantly easier, as they permit isolating problem event sequences and transitions. Use of a measurement instrument with a remote interface is also recommended, as it can be integrated with the automated tests to identify power issues as they happen over inconvenient time scales (hours, days, etc.).
Following these guidelines will help to maximize battery life for low-power devices. For prototypes where a fast time to market is critical, the verification steps along the way reduce the risk of time-consuming and costly board re-spins.
Are there any strategies you use to improve battery life? Leave us a comment!
This is a guest post from Craig MacKenzie, Staff Design Engineer at Nuvation Engineering , a U.S. and Canadian-based provider of complex electronic product development and design services.