Dolphin Integration



Over 30 years of diverse experiences in the integration of silicon IP components and providing services for ASIC/SoC design and fabrication, with in-house EDA solutions solving unaddressed challenges, make Dolphin Integration a genuine one-stop shop covering all customers’ needs for specific requests.


Silicon IP provider

  • High Resolution converters – for audio and measurement
  • Low-power register files and memories
  • Innovative libraries of Standard Cells
  • Low-power Microcontrollers and their development tools
  • Voltage regulators for optimized construction of power island architectures

EDA Solutions

  • Mixed-signal multi-language simulator SMASH
  • Schematic editor SLED for graphic entry and design configurations in a shorter time
  • Mixed-signal power consumption estimator SCROOGE TLA

SoC Integration and Custom Fabless Services

Dolphin Integration offers more than 30 years of experience in circuit design, SoC layout and application competency. Mastery of major EDA stages, especially testability, with a special emphasis on simulation to ensure circuit launches right-on-first- pass.


Design services: on-site at customer locations


ASIC design

Dolphin Integration has been offering ASIC design services for 30 years and extended its positioning with a full turnkey approach up to supply chain management.


Thanks to the experience of more than 150 design engineers, the Company masters all the steps of an ASIC/SoC’s development: specification, analog circuit design, simulation and layout, VHDL and Verilog RTL design and simulation, simulation of mixed signal circuits, logic synthesis, physical implementation, formal proof, STA, IR drop verification, DRC, LVS… up to the delivery of GDSII to the foundry or to the customer. We operate using various technological processes, from 0.35 um to 28 nm from various European or Asian foundries.


We have experience in pure logic circuits where the complexity and operating frequency require a perfect mastery of the EDA tools to optimize the performance and the silicon area; we also have a large experience in mixed-signal ASICs where the analog part is very sensitive to noise (eg analog front-ends for sensor interfaces) or in mixed signal ASICs requiring ultra low power application for saving battery life. Achieving aggressive low power characteristics is obtained with a combination of the experience of the technical teams, a set of optimized silicon IP, the mastery of special EDA hooks in addition to the standard EDA suites, completed with recipes matured over the time. The result makes the difference.


A flexible business model allows the development of complete ASIC/SoC or only part of them, as well as FPGA to ASIC migration, with commitment on results and schedules.

The designers have the experience to embed IP blocks developed in the company but also IP blocks coming from third parties.

Feel free to contact us as ASIC/SoC one-stop shop prime contractor.

ASIC verification

Dolphin Integration has been offering ASIC/SoC design services for 30 years (see ASIC design) and extended its positioning with a full turnkey approach up to supply chain management.


An important part of the work during ASIC/SoC design relies on verifications. They are the best guarantee that the silicon shall respect the ASIC/SoC specification.


In addition to the traditional simulations (analog, logic), the company is mastering mixed signal simulations with the capability to merge together analog and logic, using models possibly at various levels of representations: RTL or gate netlist for the logic part of the ASIC/SoC, transistor level or using Verilog-AMS, VHDL-AMS behavioral levels


Last but not least, the Company offers a unique service in the case of low power ASICs embedding power islands and/or voltage islands, together with linear and/or switched regulators: the know-how to define and simulate all the transition modes which are so critical and so important for ensuring a good first pass silicon with an optimized power.


Apart from simulations, Dolphin Integration’s designers have a day-to-day practice of DRC, LVS, formal proof, IR-drop…


Feel free to contact us as ASIC/SoC one-stop shop prime contractor.

Silicon validation

Dolphin Integration has been offering ASIC/SoC design services for 30 years (see ASIC design) and extended its positioning with a full turnkey approach up to supply chain management.

Part of the services offered to their customer is the validation of the prototypes after fabrication through a MPW or MLM/MLR or SLR full mask set.


During the ASIC/SoC development, the project manager establishes a characterization plan with the customer, describing the set-up required for characterizing the ASIC/SoC samples, and all the measurements to be performed together with the measurement conditions (eg Voltage, temperature range). Sometimes, samples from corner lots are also characterized.


When samples come back from fabrication, this characterization plan is applied in Dolphin Integration’s laboratory.


The test bench is built upon NI’s labview hardware and software solutions and completed by specific test boards, designed by Dolphin Integration.


Then a comparison is made with the simulation to respect the internal so called VFP (Virtual Fabrication Process)

Feel free to contact us as ASIC/SoC one-stop shop prime contractor.

Turnkey (full supply chain services)

Dolphin Integration has been offering ASIC/SoC design services for 30 years (see ASIC design).

In addition to the development itself, and to the capability of validating the prototypes on silicon (see Silicon validation), the Company offers a complete full supply chain services, managing all necessary operations with different suppliers during the production phase: wafer fabrication, wafer sorting, packaging, test, failure analysis…


Even if operations are subcontracted, Dolphin Integration keeps the complete and unique responsibility of the supply chain with respect to the customer.


During the industrialization phase of the ASIC, preceding the production phase, a complete qualification of the device is performed, according to internal quality procedures including the VFP (Virtual Fabrication Process). During that phase, Dolphin Integrations specifies the industrial test program and subcontract to test houses its realization but this know-how allows the company to keep the complete control of the yield during the production phase, insuring delivery in time and quality


Feel free to contact us as ASIC/SoC one-stop shop prime contractor.

IP Cores

Microcontrollers and IDE solution

Dolphin Integration offers a wide range of microcontroller cores, starting with the 8-bit industry standard 8051, extended with 16-bit 80251 compatible, and going up to 32-bit reaching 1 DMIPS/MHz.

Various peripherals such as I/O ports, timers, co-processors, memory interface… are also available to fit specific application requirements. Dolphin Integration also provides an innovative cache controller in order to reduce the access time and power consumption of a flash memory.


Together with its microcontrollers cores, Dolphin Integration provides the most efficient application software development solution SmartVision™. SmartVision™ embeds advanced application software debug capabilities thanks to the modeling and simulation of the complete sub-system including processors, memories and peripherals. SmartVision™ also includes BIRD™ for on-chip debug.

The microcontroller offering from Dolphin Integration enables SoC designers to drastically reduce their Time- To-Market with the most optimized solution for their application requirements.

Embedded Memory and Standard Cell Libraries

Dolphin Integration has continuously enriched the offerings of Embedded Memories (Embedded Single Port and Dual Port RAM, Embedded Single Port and Dual Port Memory Register and Metal Programmable ROM) and Standard Cell Libraries so as to offer Off-the-Shelf products from 180 nm down to 28 nm endowed with differentiated optimizations for a diversity of SoC requirements and foundry processes.


As part of Dolphin Integration’s complete solution for users, the portfolio of in-house libraries is comprised of a broad range of silicon IPs with synthesizable extensions, delivering optimal performance, power and area results.


To address Low-Power challenges in battery power applications (IoT, Wireless, Wearables…), the best standard cell library solutions characterized at appropriate low voltage are indeed required to achieve lowest power consumption for always-on domain of a SoC. Besides, 6/7-Track standard cell libraries together with unique Island Construction Kit (ICK/CLICK) enables to reach High-Density and guarantee easy and safe island construction and integration for other power domains.


TSMC awarded Dolphin Integration with the 2014 IP Partner Award for Specialty IP.

High resolution audio converters / High resolution measurement converters

Thanks to its long term experience in mixed-signal design, Dolphin Integration supplies companies worldwide with converter IPs from 180 nm to 28 nm with various optimizations in order to address a wide range of applications (portable audio, home multimedia systems, home appliances, power metering, general purpose ADC, health & fitness, battery monitoring…).

Finally, our high-resolution converters combine innovative features with all the checking tools to turn your project into a success story!

Users leverage Dolphin Integration comprehensive offering by:

Selecting low Bill-Of-Material IP

Reference application schematics are all delivered with the best trade-off for being cost-effective without performance degradation

Reducing silicon area of a SoC

Thanks to its 30 years experience in ASIC design, Dolphin Integration has acquired a recognized expertise in Mixed-Signal Design used to continuously provide the best density on silicon.

TSMC awarded Dolphin Integration with the 2011 IP Partner Award for Analog/Mixed-Signal IP.

Securing SoC architecture and design

Additionally to standard deliverables, all packages can be optionally completed with simulation views used for checking the noise propagation on critical paths. This exclusive option definitely ensures the completeness of the IP panoply.