Sonics is the leading supplier of system IP, which includes on-chip networks, security,  power and memory  subsystems. Semiconductor and systems companies use Sonics best-in-class technology to build sophisticated SoCs with the high performance, low power and flexibility needed for devices of all sizes connected to the cloud. Our broad portfolio and system-level expertise beyond the NOC domain helps customers accelerate their own innovations across the chip, regardless of design complexity.

IP Cores


SonicsGN™ (SGN) is Sonics’ 4th generation, configurable, on-chip network enabling the design of advanced SoC communications networks using a high-speed scalable fabric topology structure. As the industry’s highest frequency NoC available today, SGN allows SoC designers to deliver high-performance, simultaneous application processing for smart phones, mobile video and tablets. SGN’s configurable IP, intuitive user interface, and robust verification environment provide all the tools necessary to create speedy, robust, gate-efficient on-chip communications networks for advanced SoC designs.


The SonicsSX® On-chip Network contains a high performance, advanced fabric and a comprehensive set of data flow services for the development of complex, multicore and multi-subsystem cloud-scale SoCs. By utilizing state-of-the-art physical structure design and advanced protocol management, SonicsSX can act as a local subsystem or global interconnect solution.


Ideal for complex video processing and graphics subsystem clusters, SonicsSX provides designs with high performance throughput while maintaining impressive power management capabilities.


As a global interconnect solution, SonicsSX also supports system-wide quality-of-service mechanisms, access security, hardware monitoring/debug ports, and error handling features that facilitate higher design predictability and decrease chip development time.

In addition, SonicsSX allows SoC developers to easily transition from single channel to multiple channel external DRAM memory architectures seamlessly and transparently to software and hardwired initiators


The SonicsLX on-chip network offers SoC designers a configurable system IP block designed for the creation of complex on-chip connectivity between cores.  SonicsLX offers designers a balanced solution which couples low-power and tuned area, while maintaining high performance.


SonicsLX utilizes state-of-the-art physical structure design and advanced protocol management to deliver guaranteed high bandwidth together with fine grained power management.  Employing both a full or partial crossbar bus structure, the SonicsLX provides low latency paths between high-bandwidth master and target IP cores.


Sonics3220 solution is a non-blocking peripheral on-chip network that guarantees end-to-end performance by managing data, control and test flows between all connected cores.


Providing low latency access to a large number of low bandwidth, physically dispersed target cores, Sonics3220 uses a very low die area structure that facilitates a rapid path to simulation.


The Sonics3220 handles incoming traffic from up to four initiators and can distribute those communication requests and responses to up to 63 targets.


SonicsExpress provides a high bandwidth bridge between two clock domains, with optional voltage domain isolation. SonicsExpress supports AXI or OCP protocols and is capable of crossing clock boundaries, power boundaries, and large spans of physical distance. In addition, SonicsExpress is optimized for high-bandwidth, low-latency communication.


Sonics Performance Monitor and Hardware Trace™ (SonicsMT™) provides system visibility and diagnostics of the communication streams inside the on-chip interconnect. The IP product accelerates the post-silicon system validation and software development processes for complex systems-on-chip (SoC). SonicsMT enables architects and software development teams to create SoC performance and debugging strategies that significantly shorten the time from silicon production to optimized working system.

MemMax Scheduler

MemMax Scheduler is an intelligent Dynamic Random Access Memory scheduler designed to optimize performance in your memory subsystem.


Ideal for high-bandwidth applications, MemMax Scheduler offers a sophisticated thread-based pipeline and advanced arbitration schemes in order to reduce on-chip network over-design and redundancy. By decoupling the functionality of the SoC from the DRAM, MemMax Scheduler encourages the adoption of DRAM technology that offers the best cost and performance value for each individual application.

MemMax DRAM system

As SoC complexity grows, a major design challenge is achieving highly sustainable bandwidth when accessing shared memory. MemMax® DRAM system, integrates Sonics innovative MemMax Scheduler and Synopsys’ DesignWare® DDR Protocol Controller IP, to offer designers a “plug and play” solution enabling the rapid construction of a high performance SoC external DDR2/3 memory subsystem.