A Simple Method for Choosing ASIC Design Services

February 25, 2013, anysilicon

In 2005 I applied for a job in Singapore. The job required some technical and business skills and therefore the interview was a bit tricky.
One part of the interview related to estimating market size. They asked me to estimate the number of Piano Tuning companies which are currently active

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Lead Frame Overview and Custom-Lead Frame Benefits

February 18, 2013, anysilicon

The name leadframe (or lead-frame) is actually very accurate.
Leadframe is an alloy frame that consists of the package leads and the paddle. The silicon die is attached on the paddle and the leads are connected to the die with wirebonds. That’s it.

In the above

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Six ways to improve chip yield rate- before the project starts

February 11, 2013, anysilicon

Early on in Chip projects, yield is not taken very seriously. The common thinking goes –  anyhow there isn’t much to do as this early point of time. However, there are actually several things you can do even before the Chip design starts, which will translate to clear savings.


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Introduction to HTOL

February 04, 2013, anysilicon

HTOL (High Temperature Operating Life) is a stress test defined by JEDEC to define the reliability of IC products, and is an essential part of chip qualification tests. This post provides a high-level overview of HTOL. Obviously you should refer to the standard if you intend performing testing.
To predict

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