Monthly Archives: July 2015

ARM has acquired Israel-based Sansa Security

ARM has acquired Israel-based Sansa Security, a provider of hardware security IP and software for advanced system-on-chip components deployed in Internet of Things (IoT) and mobile devices. The company currently enables security in more than 150 million products a year and Sansa Security technology is deployed across a range of smart connected devices and enterprise systems. The deal complements the ARM security portfolio, including ARM® TrustZone® technology and SecurCore® processor IP. Terms have not been disclosed.


arm logo


“Any connected device could be a target for a malicious attack so we must embed security at every potential attack point,” said Mike Muller, CTO, ARM. “Protection against hackers works best when it is multi-layered, so we are extending our security technology capability into hardware subsystems and trusted software. This means our partners will be able to license a comprehensive security suite from a single source.”


Sansa Security technology makes it easier for manufacturers to build secure products by offering a complete hardware subsystem that adds additional isolation of security operations from the main application processor. This is complemented by software components operating on top of trusted execution environments to perform security-sensitive operations. The acquisition builds upon ARM’s embedded TrustZone technology, creating extra protection against malware and malicious software. It is a system-wide approach that underpins security-related chipset and trusted software needs. This enables the protection of any connected device and management of sensitive data and content.

Intel is in trouble…but so are TSMC and Samsung

I recently read an interesting article “Intel’s cost cuts could give rivals higher ground: analysts” where the analysis claims that Intel Corp’s move to delay the launch of its next generation chip technology to 2017 may see the company lose ground to rivals Taiwan Semiconductor Manufacturing Co and Samsung Electronics Co Ltd.


While Intel Inc. is in trouble due to failure of IDM business model’s compared to Fabless-Foundry business model, I do not think that TSMC and Samsung Electronics can keep investing in a global economy suffering from a poor consumer demand. Whether it is US economy, Chinese economy or European economy, none of the major economies in the world are really doing that well.



As I had forecasted, We recently had crash of Chinese stock market and also facing unending problems of European economy. Recently, One of top Industrialists in India, Rahul Bajaj, questioned the growth estimates of Indian economy. As quoted in that article,


I am neither an economist nor a statistician. However, as an industrialist who has run a business for several decades and observed others who manage different enterprises across many sectors, I find it challenging to reconcile 7.5 per cent growth in GVA with what one sees in industry today,” Bajaj said in the company’s Annual Report for 2014-15. ”


So, With so much global uncertainty, it is obvious to see Intel cut costs and delay introduction of new technology node due to poor economic demand. A poor economic demand would not ensure a good Return on Investments (RoI). Does it mean that TSMC and Samsung Electronics would be successful in ensuring a good RoI when they launch their 10 nm chip nodes in late 2016 and early 2017, respectively. Given the failure of macroeconomic economic policies around the globe, the consumer purchasing power of majority around the globe has diminished.


As mentioned in my first book “Mass Capitalism: A Blueprint for Economic Revival” as well as explained further in my upcoming book “Sustaining Moore’s Law: Uncertainty Leading to a Certainty of IoT Revolution“, the progress of Moore’s Law has essentially been the progress of supply-side economics. There has been “little” to “no incentive” to boost consumer demand in the US as well as global economy besides luring consumers into an unsustainable debt. Without a healthy consumer demand for the latest and greatest electronic products, any further investments towards the progress of Moore’s Law are bound to provide a poor return on investments for the foundries.



As I forecast, By October 2015 when US stock markets crash due to macroeconomic cycles resulting from unsustainable trade and budget deficits, it is really questionable whether TSMC and Samsung can continue with their launch of 10 nm chip nodes in late 2016 and early 2017 respectively, unless global semiconductor industry adopts true free market reforms where the real job creators in the economy are not only producers but also consumers. Hence, Intel Inc. is in trouble but so are its rivals TSMC and Samsung.



This is a guest post by Apek Mulay which is business and technology consultant at Mulay’s Consultancy Services. He is author of two books “Mass Capitalism: A Blueprint for Economic Revival” and “Sustaining Moore’s Law: Uncertainty Leading to a Certainty of IoT Revolution“

Fabless-Foundry model vs. Integrated Device Manufacturers Model

I authored my first book “Mass Capitalism : A Blueprint for Economic Revival” in 2014 with a purpose of letting the global semiconductor industry ( and particularly the US Semiconductor Industry) know that the Semiconductor Industry is headed for a monumental transformation in the very near future due to a global macroeconomic crisis. Having a solid knowledge of macroeconomics alongwith a decade long career in US semiconductor industry working on state-of-the-art tools and technologies, I could foresee what most industry analysts and veterans could not foresee it coming.


In this blog – I dare to raise an alarm for the global semiconductor industry which is headed in a wrong direction leading to huge problems for the industry at large. Today, We are seeing increasing consolidation happen in this industry and formation of business monopolies through elimination of competition. A healthy competition is essential for preserving innovation and by getting rid of the innovation, our progress of semiconductor industry is truly questionable  and so is the progress of our knowledge based economy.





Many Industry experts talk about the next big thing as Internet of Things (IoT) which would lead to an exponential growth of devices so much that it would surpass the combined growth achieved with both computer and mobile revolution. However, I am of the opinion that this exponential growth of IoT market cannot happen in this climate of industry monopolies. For IoT revolution to succeed, there has to be a true free market economy, a robust growth of small businesses and steady growth in consumer purchasing power of citizens in the economy.


A debt-based economy is absolutely unsustainable and global macroeconomic crisis since 2008 has made this evident to even a person who has no background in macroeconomics. Hence, whether it is for  letting the IoT revolution to happen, 450 mm wafer transition to occur, Moore’s law to progress beyond 10 nm or for recovery of global semiconductor industry at large, a good macroeconomic policy and a good monetary policy is an absolute must. So, Which Industrial model will bring about this IoT revolution – Will it be the Fabless-Foundry business model or the Integrated Device Manufacturers (IDMs)? The answer is neither and I have explained a failure of both models from a macroeconomic perspective in my first book released in 2014 “Mass Capitalism : A Blueprint for Economic Revival“, where I also put forth a third business model which is neo-fabless but it is sustainable from a macroeconomic perspective.


Debating between existing Fabless-Foundry business model and IDM business model is equivalent to debating between which economic system is better Crony Capitalism or Communism. Neither of the two economic systems have been able to solve the problems of semiconductor industry and global economy. The solution to global economy is true free market economy. Mass Capitalism is one such true free market economic system. Please do read this blog to understand the difference between Mass Capitalism, Crony Capitalism and Communism.


In my recently published article, ‘Intel is in trouble…but so are TSMC and Samsung‘, I mentioned that not only the IDMs are making cost cuts but even the foundries catering to Fabless semiconductor companies seem to be in trouble. The later has become evident in the article published in Forbes Qualcomm Is Breaking Up, Already’, where it has become obvious that even the largest fabless semiconductor company in the world is facing a massive layoffs and will not be able to continue to sustain a progress of Moore’s Law. This is due to violations of common sense macroeconomics by Fabless semiconductor businesses worldwide.


In my proposed new neo-fabless business model which leads to a sustainable macroeconomy, all defects of existing fabless-foundry business model have been rectified which have resulted in trade and budget deficits. Additionally, the power of existing fabless-foundry business model to be able to usher in a growth of small businesses has been preserved. I have explained in my upcoming book published by Morgan & Claypool publishers entitled ‘Sustaining Moore’s Law: Uncertainty Leading to a Certainty of IoT Revolution, how this new business model for semiconductor industry would bring about the next big thing which is the IoT Revolution.


The foreword for my second book is by world renowned Professor of Economics and author of six International best sellers, Professor Ravi Batra. In his foreword, Professor Batra mentions,

To my knowledge, Mr. Mulay is the only writer who has made a connection between Moore’s Law and macroeconomic policy. The Law has played a significant role in the vast computer revolution, but the author argues that without proper economic policies the future validity of this law is at best uncertain. Mr. Mulay’s contribution to the economic and technological literature is both monumental and practical. It is an innovative approach that deserves further study and research. It will appeal to those looking for new ideas.”


I hope global semiconductor industry will take these ideas and help bring about the next big thing of IoT revolution. The sustainability and profitability of  this new business model would be useful for every developed economy such as USA, Germany, France, etc. Additionally, It would also help Chinese economy transition to its much need economy based on Innovation. At the same time, my first book  “Mass Capitalism : A Blueprint for Economic Revival” would act as a blueprint for developing economies like India and its prime minister’s signature “Make in India” campaign for creating manufacturing jobs in India and the second book ‘Sustaining Moore’s Law: Uncertainty Leading to a Certainty of IoT Revolution‘ would act as a blueprint for Prime Minister, Narendra Modi’s Digital India Campaign.



This is a guest post by Apek Mulay which is business and technology consultant at Mulay’s Consultancy Services. He is author of two books “Mass Capitalism: A Blueprint for Economic Revival” and “Sustaining Moore’s Law: Uncertainty Leading to a Certainty of IoT Revolution“.

Stack Die (3D IC) Assembly – Drivers and Challenges

With the increased demand for improved functionality and miniaturization in portable hand-held devices—such as cell phones, PDA, digital cameras and laptop computers—original equipment manufacturers (OEMs) and integrated device manufactures (IDMs) have joined forces to ensure enhanced chip performance without sacrificing valuable board real estate. Rather than use conventional single chip or multiple-chip type packaging, chip designers have turned to the assembly houses for multiple die stacking solutions. Stacking of die, such multiple memory chips, not only provides a reduction in overall package footprint, but a substantial improvement in electrical performance through quicker transmissions requiring less energy to drive the signals. This extends Moore’s Law and enables a new generation of tiny but powerful devices.


With cell phone subscribers increasing to over 5 billion, there is at least one stack-die assembly in every phone sold. Die stacking—or 3D-IC packaging—has become common place among leading semiconductor manufacturers, even as the assembly houses continue to be faced with challenges as the die stacking becomes more and more complex. In order to increase functionality, the number of die stacked can range from 2-18 integrated circuit devices (ICDs) as reported in current device applications.


Die stacking requires all known-good-die (KGD) to be thinned and bonded on top of each over in either an overhang pattern as shown in first figure below or a pyramid stacking as shown in the second figure. As a cost saver, most die stacking is typically wire bonded to form the interconnection within a standard package.


3D IC die stacking with overhang

Die Stacking with Overhang

3D IC die stacking pyramid assembly

3D IC Pyramid Assembly

There are risks associated with stacking two or more KGD together, since one KGD can function independently well, but within a stack assembly it may not as effectively. Rework may be required to remove the bad die or the entire stack-die assembly may be bad together. In addition, heat dissipation with large stacks can be a concern and risk factor as well. However, the advantages of the high level of functional integration achieved by mixing complex semiconductor chips—such as aMEMS (electro-mechanical systems) or silicon ASIC chips—with stacks of memory chips far outweigh the risk.


To reduce some of the risk in die stacking, packaging expertise is required to assemble multiple die within a single footprint. Each stack configuration requires precision die bonding for both the pyramid stacking and overhang die stacking. If die are not aligned properly during the bonding step, there may not be enough room to wire bond to the adjoining die pads. This becomes comes more apparent as the tolerances decrease with each die stacked. In some cases, die alignment better than +/-4μms must be achieved during the die bonding.


Once the die are bonded together, many factors must be weighed before commencing to wire bond the package. Stack-die bonding requires the most advanced bonding techniques within a single platform such as low loops, chain bonding (multiple-tier) and/or stand-off-stitch (SOS). For each bonding technique, optimization of the applied bonding force and trajectory of the loop formation must be achieved and maintained. If too much force is applied, die deflection can occur, resulting in potentially cracked die or damage to die pad metallization. In addition, the design of capillary is also an important factor to consider when bonding a die stack.


How far will die stacking go? It is tough to say. Some never thought die stacking would go beyond four devices. Through technology advancements of TSVs (Thru-hole Silicon Vias) combined with wafer-level packaging (WLP), the assembly house will play a critical role in the coming years on just how far a die stack assembly can go to achieve the optimum performance and functionality.



This is a guest post by Palomar Technologies, formerly Hughes Aircraft, which is the global leader of die attach solutions, wire bonding equipment, optoelectronic packaging systems and precision assembly services.

TSMC slashes 20nm and 28nm pricing by up to 10%

Taiwan Semiconductor Manufacturing Company (TSMC) has dropped its prices on 28nm and 20nm process technologies by 5-10% in hopes to secure additional orders from major companies which includes Qualcomm and MediaTek, according to DigiTimes. However, the reaction of 28nm prices will most likely affect AMD and Nvidia positively, who are the major producers of the largest and the most complex chips ever designed at TSMC. In particular, AMD’s “Fiji” and Nvidia’s GM200 graphics processing units feature die sizes of around 600mm² and are extremely expensive to manufacture. At this point, any particular decrease in price is a good news for GPU developers.


It is also observed that Taiwan Semiconductor Manufacturing Co. is not the only company to face rejection of chip orders, the report claims. GlobalFoundries and United Microelectronics Corp. also suffered from lowered demand for smartphones. The reduction in price are also aimed at boosting TSMC’s capacity utilization rates of 28nm and 20nm lines to more than 80%, the sources noted.


In response, TSMC declined to comment. Decelerating smartphone demand has discouraged chip providers from placing orders with their foundry partners since the second quarter, the sources said. Foundries like United Microelectronics (UMC) and Globalfoundries have seen their 28nm customers cut orders particularly for baseband chips, the sources indicated.


Also facing a cutback of orders from its key mobile chip clients, TSMC has lowered its wafer quotes for 28nm and 20nm process technologies as much as 10%, the sources suggested. TSMC’s 28nm and 20nm process utilization rates already fell to as low as 70% and 60%, respectively, in the second quarter, the sources observed. By offering discounts, the foundry expects to regain orders and improve the process utilization rates to more than 80%, the sources said.




It is newsworthy that TSMC’s 20nm fabrication process (CLN20SOC) was exclusively designed for mobile system-on-chips. In which the technology is incompatible with any other product or system. In fact, TSMC hoped that the 20nm process will help it to procure gain massive orders from Apple. While Apple did become a major customer of TSMC, it is unlikely that the CLN20SOC technology is as popular as the foundry originally believed. So far, TSMC has received around $3.25 billion in payments for wafers processed using 20nm fabrication process. The largest customer for 20nm chips is Apple, which will significantly reduce its orders for 20nm products about a quarter before it launches its next-gen iPhone and iPad based on all-new A9 system-on-chips produced using 14nm and 16nm FinFET technologies at Samsung Electronics, GlobalFoundries and, eventually, at TSMC.


Although, TSMC did not comment on the news-story.

Semiconductor IP Market worth $5.63 Billion by 2020

The Semiconductor IP marketplace is a two digit rate growing market which should continue its increase next years according to Gartner Dataquest and according to a new market research report by Form Factor.


Semiconductor IP is expected to reach $5.63 billion in 2020 at a CAGR of 12.6% from 2014 to 2020. Semiconductor IPs are used almost in all semiconductor application , beginning with consumer segment and telecommunication market areas and now up to more conservative market segments as medical, automotive and defense.




Presently, there have been remarkable changes recorded in the landscape of the semiconductor IP industry’s ecosystem with several developments in market segments such as open source IP vendors, IP core developers, IP aggregators, IP licensing vendors, and IP Customers including fabless companies, foundry, and IDM players. The Semiconductor IP Market is growing in both the Integrated Circuit (IC) IP and System-on-Chip (SoC) IP sub-sectors.


The IP market is growth is possible due to the following reasons:


  • It’s simply cost-effective to purchase IP than to develop it internally. For high complexity IPs, that requires heavy verification efforts – the time to market is also comes into play.
  • Companies tend to focus on their core competence and outsource IPs from 3-party suppliers.


Today, ARM, Synopsys, and Imagination Technologies are the three major market leaders contributing the largest market share in the semiconductor IP market space. Moreover, ARM continues to be the clear market leader in semiconductor IP core licensing.