Blog

OmniPHY to Demonstrate Automotive Design Solutions at IEEE-SA Automotive Ethernet Technology Day

October 31, 2017, anysilicon

OmniPHY, Inc. OmniPHY Semiconductor, Inc. today announced it will be showcasing how it leverages automotive Ethernet technology to create robust automotive semiconductor IP solutions at the IEEE-SA Automotive Ethernet Technology Day forum. The event is being held on October 31 – November 2, 2017, at the San Jose McEnery Convention

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asicNorth announces immediate availability of its IoT Endpoint ASIC Platform

October 24, 2017, anysilicon

asicNorth is pleased to announce immediate availability of its silicon proven platform to rapidly deploy IoT Endpoint ASICs – IoTa. Samples are available for prototype development.
 
IoTa is structured to be highly configurable enabling support for various radio protocols, ARM Cortex®-M0 compatible peripherals, analog/mixed-signal requirements, and external sensors. IoTa

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Understanding ASIC Development

October 23, 2017, anysilicon

ASIC is an acronym for Application Specific Integrated Circuit. It is designed for a specific or customized use as opposed to one that serves a generally available. Examples of ASIC include chips that are designed to run specific devices such as Apple A11 CPU for example. You can find ASIC

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M31 Technology and Corigine have launched the world’s first USB-IF certified 28nm Superspeed+ USB 3.1 Gen 2 IP Solution

October 20, 2017, anysilicon

M31 Technology Corporation, a global Silicon Intellectual Property (IP) boutique, today announced that Corigine’s USB 3.1 Gen 2 PC host and device controller intellectual property (IP) with M31 28nm PHY is certified by the USB Implementers Forum (USB-IF) and compliant with USB SuperSpeed+, the fastest USB speed standard.
 
USB

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Montage Technology Licenses Allegro DVT’s IP for Next Generation Set-Top Box Chips

October 19, 2017, anysilicon

Allegro DVT, a leader in video compliance streams and video codec semiconductor IP solutions, announced today that Montage Technology, a leading fabless semiconductor provider for smart home entertainment and data center markets, has licensed Allegro DVT’s AL-E100 multi-format H.264/AVC and H.265/HEVC encoder IP for integration into its next-generation set-top box

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Guide to Semiconductor Wafer Sort

October 19, 2017, anysilicon

Wafer sort (or wafer test), is a part of the testing process performed on silicon wafers. Wafer sort is a simple electrical test, that is performed on a silicon die while it’s in a wafer form.
 
Wafer sort’s main purpose is to identify the non-functional dies and thereby avoiding

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