Monthly Archives: February 2019

97 Semiconductor Wafer Fabs Closed or Repurposed During Past 10 Years

The IC industry has been on a mission to pare down older capacity (i.e., ≤200mm wafers) in order to produce devices more cost-effectively on larger wafers.  In its recently released Global Wafer Capacity 2019-2023 report, IC Insights shows that due to the surge of merger and acquisition activity in the middle of this decade and with more companies producing IC devices on sub-20nm process technology, suppliers are eliminating inefficient wafer fabs. Over the past ten years (2009-2018), semiconductor manufacturers around the world have closed or repurposed 97 wafer fabs, according to findings in the new report.


Figure 1 shows that since 2009, 42 150mm wafer fabs and 24 200mm wafer fabs have been shuttered. 300mm wafer fabs have accounted for only 10% of total fab closures since 2009.  Qimonda was the first company to close a 300mm wafer fab after it went out of business in early 2009.



Figure 1


Three 150mm wafer fabs were closed or repurposed in 2018.  Two of these fabs belonged to Renesas.  Renesas closed one fab in Konan, Kochi, Japan that produced analog, logic, and some older microcomponent devices.  A second Renesas fab in Otsu, Shiga, Japan was repurposed and now makes only optoelectronic devices.  A third fab, Fab 1 belonging to Polar Semiconductor (now Sanken) in Bloomington, Minnesota, also was closed.  This fab manufactured analog, discretes, and offered some foundry services.


Given the skyrocketing cost of new wafer fabs and manufacturing equipment, and as more IC companies transition to a fab-lite or fabless business model, IC Insights anticipates there will be additional fab closures in the next few years.  Five closures/repurposed fabs have already been publicly announced. Samsung’s 300mm memory fab (Line 13) will be fully converted this year to produce image sensors and TI’s 200mm analog GFAB in Greenock, Scotland, is expected to close by June 2019.  Renesas plans to close two 150mm fabs (Otsu, Shiga and Ube, Yamaguchi, Japan) in 2020 or 2021, and Analog Devices plans to close its 150mm wafer fab in Milpitas, California in February 2021.


Semiconductor suppliers in Japan have closed a total of 36 wafer fabs since 2009, more than any other country/region.   In the same period, 31 fabs were closed in North America, 18 fabs were shuttered in Europe, and 12 wafer fabs were closed throughout the Asia-Pacific region (Figure 2).  With 36 fab closures and very few new fabs going up there, it is little wonder that Japan now accounts for only 5% of worldwide semiconductor capital spending.



Figure 2




Report Details:  Global Wafer Capacity 2019-2023
IC Insights’ Global Wafer Capacity 2019-2023—Detailed Analysis and Forecast of the IC Industry’s Wafer Fab Capacity report assesses the IC industry’s capacity by wafer size, minimum process geometry, technology type, geographic region, and device type through 2023. The report includes detailed profiles of the companies with the greatest fab capacity and gives comprehensive specifications on existing wafer fab facilities. Global Wafer Capacity 2019-2023 is priced at $4,890 for an individual user license.  A multi-user worldwide corporate license is available for $7,590.

To review additional information about IC Insights’ new and existing market research reports and services please visit our website:



More Information Contact

For more information regarding this Research Bulletin, please contact Bill McClean, President at IC Insights. Phone: +1-480-348-1133 email:


Semiconductor Foundry Process Roadmap

The advancement of the semiconductor industry hinges on the ability of IC manufacturers to continue offering more performance and functionality for the money.  As mainstream CMOS processes reach their theoretical, practical, and economic limits, lowering the cost of ICs (on a per-function or per-performance basis) is more critical and challenging than ever. The 500-page, 2019 edition of IC Insights’ McClean Report—A Complete Analysis and Forecast of the Integrated Circuit Industry (released in January 2019) shows that there is more variety than ever among the logic-oriented process technologies that companies offer.  Figure 1 lists several of the leading advanced logic technologies that companies are presently using. Derivative versions of each process generation between major nodes have become regular occurrences.



Figure 1: Semiconductor Foundry Process Roadmap


Intel — Its ninth-generation processors unveiled in late 2018 have the code-name “Coffee Lake-S” or, sometimes called “Coffee Lake Refresh.” Intel says these processors are a new generation of products, but they seem to be more of an enhancement of the eighth-generation products.  Details are scarce, but these processors appear to be manufactured on an enhanced version of the 14nm++ process, or what might be considered a 14nm+++ process.

Mass production using its 10nm process will ramp in 2019 with the new “Sunny Cove” family of processors that it unveiled in December 2018.  It appears that the Sunny Cove architecture has essentially taken the place of the 10nm Cannon Lake architecture that was supposed to be released in 2019.  In 2020, a 10nm+ derivative process is expected to go into mass production.



TSMC — TSMC’s 10nm finFET process entered volume production in late 2016 but it has moved quickly from 10nm to 7nm.  TSMC believes the 7nm generation will be a long-lived node like 28nm and 16nm.

TSMC’s 5nm process is under development and scheduled to enter risk production in the first half of 2019, with volume production coming in 2020.  The process will use EUV, but it will not be the first of TSMC’s processes to take advantage of EUV technology.  The first will be an improved version of the company’s 7nm technology.  The N7+ process will employ EUV only on critical layers (four layers), while the N5 process will use EUV extensively (up to 14 layers).  N7+ is scheduled to enter volume production in the second quarter of 2019.



Samsung — In early 2018, Samsung started mass production of a second-generation 10nm process called 10LPP (low power plus). Later in 2018, Samsung introduced a third-generation 10nm process called 10LPU (low power ultimate) that provided another performance increase.  Samsung uses triple patterning lithography at 10nm.  Unlike TSMC, Samsung believes its 10nm family of processes (including 8nm derivatives) will have a long lifecycle.

Samsung’s 7nm technology went into risk production in October 2018.  The company skipped offering a 7nm process with immersion lithography and decided instead to move directly to a EUV-based 7nm process.  The company is using EUV for 8-10 layers at 7nm.



GlobalFoundries — GF views and markets its 22nm FD-SOI process as being complementary to its 14nm finFET technology.  The company says the 22FDX platform delivers performance very close to that of finFET, but with manufacturing costs the same as 28nm technology.

In August 2018, GlobalFoundries made a major shift in strategy by announcing it would halt 7nm development because of the enormous expense in ramping production at that technology node and because there were too few foundry customers planning to use the next-generation process.  As a result, the company shifted its R&D efforts to further enhance its 14nm and 12nm finFET processes and its fully depleted SOI technologies.


For five decades, there have been amazing improvements in the productivity and performance of integrated circuit technology.  While the industry has surmounted many obstacles put in front of it, it seems the barriers keep getting bigger.  Despite this, IC designers and manufacturers are developing solutions that seem more revolutionary than evolutionary to increase chip functionality.


Report Details:  The 2019 McClean Report
Additional details on other technology and market trends within the IC industry are provided in The McClean Report—A Complete Analysis and Forecast of the Integrated Circuit Industry (released in January 2019).  A subscription to The McClean Report includes free monthly updates from March through November (including a 200+ page Mid-Year Update), and free access to subscriber-only webinars throughout the year.  An individual-user license to the 2019 edition of The McClean Report is priced at $4,990 and includes an Internet access password.  A multi-user worldwide corporate license is available for $7,990.
To review additional information about IC Insights’ new and existing market research reports and services please visit our website:


Graphcore Selected 16nm FinFet ESD Solutions from Sofics

Graphcore (, the technology company that has developed a completely new type of processor, the Intelligence Processing Unit (IPU), which lets artificial intelligence (AI) innovators create next generation AI applications, selected TakeCharge® technology from Sofics bvba of Belgium to protect its Colossus GC2 IPU from electrostatic discharge (ESD). Sofics is a leading semiconductor integrated circuit IP provider.


“Efficient AI processing power is rapidly becoming the most sought-after resource in the technological world. We believe our IPU technology will become the worldwide standard for machine intelligence compute. Confidence in our chosen partners is critical to us – Sofics offered us flexibility with customization, a proven silicon ESD portfolio and fast time to market. Within just a few weeks we went from first contact to contract to solution delivery,”, said Phil Horsfield, VP Silicon at Graphcore.


“This reflects exactly our value in the fabless ecosystem: enable customers like Graphcore with timely delivery of pre-developed and proven solutions: customized to, and matching their advanced applications, with robustness as needed, at a cost that is lower and within a timeline that is much faster than any alternative development”, said Koen Verhaege, CEO at Sofics.


“Whether it is 0.18um CMOS or 12nm FinFet does not really matter. Fabless companies will always benefit from a shorter timeline and a lower cost combined with the confidence of a working solution”.


TakeCharge cells as well as robust I/O solutions are readily available from Sofics. Click here to read more about Sofics IP cores.

CoreHW launches a highly accurate indoor positioning solution

CoreHW RABBIT (Rotating Antenna for Bluetooth Beacon and Internet of Things) solution is designed for Bluetooth 5.1, which has an unprecedented direction-finding feature. The new technology makes it possible for Bluetooth devices to determine the direction of a Bluetooth signal transmission and enables centimeter-level positioning accuracy.


CoreHW RABBIT is optimized specifically for Bluetooth 5.1 Angle of Arrival (AoA) and Angle of Departure (AoD) positioning application. This new, cost-effective solution by CoreHW is expected to disrupt the exponentially growing indoor positioning market.


The application areas include:

  • accurate indoor positioning (cm-level positioning accuracy)
  • asset tracking
  • location-based advertising
  • Point of Interest
  • navigation systems
  • aftermarket automotive applications


The components needed to take full advantage of Bluetooth AoA/AoD are a Bluetooth 5.1 capable transceiver, phase accurate switch and antenna array. The unique RF switch developed by CoreHW features 16 phase matched antenna ports, which can be used to drive single-ended or differential antennas.


As CoreHW’s goal is to be a one-stop partner for their customers, the company also provides custom antenna design service in addition to providing antenna reference designs and positioning algorithms.


For more information:

CEO Talk: Oliver Maiwald, Sencio B.V

This interview was held with Mr. Oliver Maiwald, CEO of Sencio B.V.


Tell me a bit about your background? How did you first get started with Sencio?


I have had a fairly circuitous route to the role of CEO. My first step was as an electrical technician working on the central computer of a destroyer in the German Navy. Although it was necessary to leave after a few years to push my boundaries, to this day I still feel strongly connected to my maritime background. And it continues to play a significant role in my life outside of work.


Around 1998, I was involved in co-developing the world’s first DECT module to focus on data communication. Continuing to build on this development took me from Germany across the border into the Netherlands to the National Semiconductors / SiTel facility in ‘s-Hertogenbosch. It was here I further built up my skills and experience, with a diverse range of roles from technical support through to product marketing.



Following the successful acquisition and integration of SiTel by Dialog Semiconductor, just like with my role in the Navy I once again started to feel the need to move on to increase my responsibility and take on new challenges. Sencio was looking to bring in fresh ideas and leadership to tackle the challenges they were facing as European specialist IC packaging company. So, when I was offered the position as Sencio’s new CEO in 2014, it was perfect timing.


Tell me about Sencio?


Sencio is an independent package design and assembly company, based on the Novio Tech Campus in Nijmegen, the Netherlands. We are fully IATF 16949 certified and offer customized functional packaging solutions for MEMS and integrated sensor systems, primarily for automotive and industrial applications. We help our customers address their package and assembly needs, from system design to package concept, through development and prototyping to volume manufacturing and assembly of a functional packaging solution. Additionally, we can even manage the component supply chain for their system, saving them time and effort.


Along with full volume production and assembly services, we also offer fast turnaround assembly of a small series of devices. These prototypes can be used for full electrical and functional verification of the first silicon coming out of the wafer fab for example. This is an ideal service for everyone, from start-ups and small and medium-sized enterprises (SMEs) right up to recognized large multinationals.


What problem did you see that needed to be fixed? What is your approach to solving that?


As with many companies that are spun-out from a larger supplier, one of the first challenges is to become less reliant on business coming from a narrow customer base. My initial focus at Sencio was therefore to build on the existing customer base and increase profit.


Of course, these things do not happen overnight, they require patience and investment. And as a medium-sized European company, it has been about understanding our niche in the market and how we need to adapt to changing market conditions. But gradually and sustainably we have built on our existing experience while also learning how we could fit our offering to address the needs of new markets.


How was the role/offering of Sencio changed during the recent years?


Since beginning at Sencio I have seen my role change, but that has been as part of a longer- term vision. To start we needed to stabilize the company by building growth through increased production line activities. Now we have that stability it is time to sustainably build on it, by looking at how we can further adapt our offering to meet customers needs.


Did any of the market consolidation (or acquisition) affected your business and how?


As the industry moves to even more integrated solutions, we have seen quite some change in customer requirements. This is leading to consolidation of the market from a slightly different perspective. In the past there was clear differentiation between the different assembly levels for electronics: with chip fabrication, IC assembly, PCB assembly and finally system assembly. Today these demarcation lines are blurring especially with complete System-in-Package (SiP) techniques – where we can now go from chip fabrication to encapsulated system assembly almost in a single step.


Packaging is also no longer just about protecting the sensitive electronics and connections, it increasingly has a functional role. That can range from simply combining electrical and mechanical or structural features into a standard outline SiP right up to a complete freeform shaped plug’n’play module that can be ‘clipped’ into place.


The result of this consolidation is we need offer more than just classic encapsulation and assembly services. We need to support customers with a broader range of skills and capabilities to successfully create complete system solutions. For example, while the basic functionality of the IC and sensor can be tested in the fab, with customized encapsulation and packaging of a complete system you can no longer rely on general testers and handlers. So, we need to help our customers consider how they will encapsulate their functionality and/or introduce it into the package, but also how they will test the end result.


What is a typical customer for Sencio?


Sencio is not one of the big OSAT players that support pure volume assembly. We are a specialist supplier capable of supporting more customized designs and high-quality niche volumes.


For example, our production facilities in Nijmegen can turn out some 3 to 5 million parts per year, which is ideal for customers who require solutions in relatively small volumes in comparison to the large OSAT players. But our customers also appreciate that we can support them through the entire process and as many of them are automotive suppliers we need to offer the highest quality.


Another typical Sencio customer is young companies and start-ups. We have plenty of experience to draw on to help these companies develop a system solution that is suitable for their applications.


What are the 3 top things you wish your customers would do better (or different)?


There is really only one thing I can think of. Customers come to us with many excellent projects but sometimes they may not have fully considered the practical implementation. For example, the concept works under standard conditions, but the practical reality is that it needs to operate in extremely environmentally harsh environments. So often we have to consider the impact practicalities have on the package and assembly, but also the potential stresses that they may have on the encapsulated IC solution.


However, this is another way our experience, including an understanding of industrialization, can help them. So, what I would wish for is for customers to simply talk to us at a much earlier stage in their product development to see if we can address potential challenges before going into the encapsulation and assembly stage.


What is your #1 advice for people who want to work for Sencio?


There is a Bavarian or German saying that essentially translates as ‘you must withstand one’s own thirst’. Or to put it another way be patient! This can be difficult for many people to accept as it goes against the grain of ‘fast-moving’ high-tech companies. It doesn’t mean that there is a shortage of ideas and innovation at Sencio. On the contrary. It’s simply that we are building the company with the goal of sustainable long-term growth rather than ‘quick wins or rapid expansion’.


What is the best moment in your day?


That moment of waking up. Realizing it is the start of a new day. A new day of unknown challenges and opportunities. I believe this reflects my positive attitude on life and how much I look forward to what each day brings, whether work challenges or relaxing pastimes.


How do you spend your time outside working hours?


I pursue several sporting activities to keep energized. But I also like the opportunity to breakaway completely from work. There are two different ways I achieve this, both of which are in many ways linked to my time in the German Navy. I love sailing on the open water and try to either skipper a boat myself or join a racing boat whenever I can, although not as much as I would like! The second is marching. Occasional organized marches are the perfect way to stretch my limbs and, often traversing 40 km or more, there’s plenty of time to catch up with old friends.

Semiconductor Wafer Capacity Per Region

IC Insights recently released its new Global Wafer Capacity 2019-2023 report that provides in-depth detail, analyses, and forecasts for IC industry capacity by wafer size, process geometry, region, and product type through 2023.  Figure 1 shows the world’s installed monthly wafer production capacity by geographic region (or country) as of December 2018.  Each number represents the total installed monthly capacity of fabs located in that region regardless of the headquarters location of the company that own the fab(s).  For example, the wafer capacity that South Korea-based Samsung has installed in the U.S. is counted in the North America capacity total, not in the South Korea capacity total.  The ROW “region” consists primarily of Singapore, Israel, and Malaysia, but also includes countries/regions such as Russia, Belarus, and Australia.


Figure 1

As shown, Taiwan led all regions/countries in wafer capacity with 21.8% share, a slight increase from 21.3% in 2017 (Taiwan first became the global wafer capacity leader in 2015.)  Taiwan’s capacity share was only slightly ahead of South Korea, which accounted for 21.3% of global wafer capacity in 2018, according to the Global Wafer Capacity 2019-2023 report.  TSMC in Taiwan and Samsung and SK Hynix in South Korea accounted for the vast share of wafer fab capacity in each country and were the top three capacity leaders worldwide. TSMC held 67% of Taiwan’s capacity while Samsung and SK Hynix represented 94% of the installed IC wafer capacity in South Korea at the end of 2018.



Japan remained firmly in third place with just over 16.8% of global wafer fab capacity.  Micron’s purchase of Elpida several years ago and other recent major changes in manufacturing strategies of companies in Japan, including Panasonic spinning off some of its fabs into separate companies, means that the top two companies (Toshiba Memory and Renesas) accounted for 62% of that country’s wafer fab capacity.


China showed the largest increase in global wafer capacity share in 2018, rising 1.7 percentage points from a 10.8% share in 2017 to a 12.5% share in 2018.  It nearly tied North America as the fourth-largest country/region with installed capacity.  A lot of buzz circulated about China-based startups and their new wafer fabs during 2018. Meanwhile, other global companies expanded their manufacturing presence in China last year so it would be expected that the country’s capacity share would show a significant increase.  China’s percentage gain came mostly at the expense of ROW and North America.  The share of capacity in the ROW region slipped 0.8 percentage points from 9.5% in 2017 to 8.7% in 2018. North America’s share of capacity declined 0.4 percentage points in 2018.


Report Details:  Global Wafer Capacity 2019-2023

IC Insights’ Global Wafer Capacity 2019-2023—Detailed Analysis and Forecast of the IC Industry’s Wafer Fab Capacity report assesses the IC industry’s capacity by wafer size, minimum process geometry, technology type, geographic region, and device type through 2023. The report includes detailed profiles of the companies with the greatest fab capacity and gives comprehensive specifications on existing wafer fab facilities. Global Wafer Capacity 2019-2023 is priced at $4,890 for an individual user license.  A multi-user worldwide corporate license is available for $7,590.

To review additional information about IC Insights’ new and existing market research reports and services please visit our website:

More Information Contact

For more information regarding this Research Bulletin, please contact Bill McClean, President at IC Insights. Phone: +1-480-348-1133 email:

PDF Version of This Bulletin

A PDF version of this Research Bulletin can be downloaded from our website at