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eSilicon Announces Technical Advisory Board

January 29, 2019, anysilicon

eSilicon, a leading provider of FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, announced today the formation of a technical advisory board (TAB) focused on guiding the company’s development work associated with artificial intelligence ASICS. Members of the TAB include Dr. Dileep Bhandarkar, Dr. Michael Orshansky and Dr. Mattan Erez. The TAB will be led internally by Patrick Soheili.

 

Dr. Dileep Bhandarkar is an independent datacenter technologies and neural network consultant and is the TAB chairperson. Prior to becoming an independent consultant, Dr. Bhandarkar was the vice president of technology at Qualcomm. Prior to Qualcomm, he was a distinguished engineer at Microsoft and director of architecture at Intel. He has also held positions at Digital Equipment Corporation and Texas Instruments. Dr. Bhandarkar holds a B. Tech. in EE from the Indian Institute of Technology, Bombay and a PhD in EE/Computer Science from Carnegie Mellon University. He is an IEEE fellow.

 

Dr. Michael Orshansky is a professor and John E. Kasch faculty fellow at the Department of Electrical and Computer Engineering, University of Texas at Austin. Dr. Orshansky received his BS, MS, and PhD degrees in Electrical Engineering and Computer Sciences from the University of California, Berkeley. His recent research is on approximate computing for on-chip machine learning acceleration. Prior to joining UT Austin, he was a research scientist and lecturer with the Department of EECS at UC Berkeley. Prior to moving into academic research, Dr. Orshansky was an early employee at eSilicon. He is an IEEE fellow.

 

Dr. Mattan Erez is a professor and a Temple Foundation faculty fellow at the Department of Electrical and Computer Engineering at the University of Texas at Austin. His research focuses on improving the performance, efficiency, and scalability of computing systems through advances in memory systems, hardware architecture, software systems, and programming models. His current focus areas are architectures for machine learning, large-scale and high-performance computing, and memory systems. Mattan received a BSc in Electrical Engineering and a BA in Physics from the Technion, Israel Institute of Technology and his MS and PhD in Electrical Engineering from Stanford University.

 

Patrick Soheili is vice president, business and corporate development at eSilicon Corporation. He is responsible for eSilicon’s worldwide business and corporate development activities, with a specific focus on artificial intelligence. Mr. Soheili has been president and CEO of On Demand Microelectronics, Cradle Technologies and Softcoin. He was a founding partner of Barrington Partners, a technology-focused venture capital firm. He has also held positions at Invox Technology, Altera Corporation, AMD and TRW. Mr. Soheili holds a Bachelor of Science in Mathematics from University of California, Santa Barbara and a Masters of Business Administration from Purdue University.

 

“The artificial intelligence field is rapidly evolving. Deploying ASIC technology to support AI accelerator development presents many challenges,” said Patrick Soheili. “The eSilicon neuASIC™ platform provides AI-specific IP and an architecture to address these challenges. I welcome the addition of our world-class TAB to help ensure we hit the mark for the dynamic and growing AI field.”

 

To learn more about eSilicon’s 7nm neuASIC IP platform or to inquire about access to the platform for design, visit eSilicon’s neuASIC web page or contact your eSilicon sales representative directly or via sales@esilicon.com.

 

 

About eSilicon
eSilicon provides complex FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions. Our ASIC-proven, differentiating IP includes highly configurable 7nm 56G/112G SerDes plus networking-optimized 16/14/7nm FinFET IP platforms featuring HBM2 PHY, TCAM, specialized memory compilers and I/O libraries. Our neuASIC™ platform provides AI-specific IP and a modular design methodology to create adaptable, highly efficient AI ASICs. eSilicon serves the high-bandwidth networking, high-performance computing, AI and 5G infrastructure markets. www.esilicon.com

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