A circuit edit is when you need to modify an existing ASIC or integrated circuit for whatever reason. This is usually done with the help of an ion beam that is focused onto the chip to modify it as per the request of the designer. Engineers usually opt for this process when their chip fails to behave or operate in a manner that it is supposed to. The circuit edit can be done to either create a new connection between certain components of the circuit or remove a connection that is causing the issue such as creating shorts or simply using up too much power which is having a negative impact on the overall performance of the integrated circuit.
One of the most valuable applications of FIB circuit edit is first-silicon debugging. When a new ASIC or SoC returns from fabrication and a design problem is discovered, engineers can use FIB to implement a proposed circuit modification directly on the existing silicon. Interconnects can be cut, rerouted or reconnected so that the proposed engineering change can be electrically tested before committing to a new mask revision. This allows the design team to verify whether an Engineering Change Order (ECO) actually solves the problem and can potentially save significant development time and reduce the risk of another unsuccessful silicon iteration.
FIB circuit editing is a process in which a focused ion beam is used to modify the logic or interconnects on a circuit wafer. FIB circuit edit is usually an extremely time consuming as well as expensive process which is why it is important to pay good attention to when you are redesigning the faulty chip that is being sent for modification through the FIB circuit edit technique.
As mentioned before, FIB circuit edit technique can be used to cut off a faulty block on the circuit, it can be used to make new connections if one has shorted, it can be used to cut off a metal track if too much material has been deposited, and, on the contrary, it can also be used to deposit more metal material to develop a connection. The process is an extremely precise one and great care must be taken to ensure that all the details are correctly traced out onto the chip considering that most of the cuts and additions need to be made on a scale of nano and micrometers. The high energy beam can be used to cut off material as well as deposit metals such as tungsten, platinum, and silicon dioxide among others with careful precision and accuracy thanks to expert navigation systems.
With the help of FIB circuit editing, you can modify the logic of the IC, create new probe pads at various locations on the wafer, increase or decrease the total circuit resistance, as well as perform failure analysis if you are interested in figuring out what actually caused your circuit to fail and rendered it unable to perform its desired function in the first place.
When planning for a focused ion beam circuit edit, you have to make sure as a designer that you not only produce a usable chip, but also protect its integrity. It is very easy to damage the fragile integrated circuit during this process which is why it is recommended to only implement the minimum possible number of edits on a single chip so as to decrease the risk of permanent damage. You do not want to end up with an edited chip that has a completely destroyed structure at the sub micron level.
FIB circuit editing can also provide access to internal signals that were not originally available through the device’s test interface. A FIB system can expose an internal conductor and create a small conductive probe pad, allowing engineers to measure signal currents or voltages while the device is under test. Circuit edit can also be particularly valuable during first-silicon bring-up when on-chip debug or Design-for-Test structures such as BIST, scan chains or test-access points are not operating correctly. Repairing or bypassing these structures with FIB can restore the diagnostic access needed to continue debugging the rest of the IC.
As semiconductor technologies become more complex, FIB circuit editing becomes increasingly challenging. Modern devices can contain many tightly packed interconnect layers, making it difficult to reach lower-level circuitry from the front side. In these cases, engineers may approach the target from the backside of the silicon, using a combination of substrate thinning, laser-assisted preparation and FIB milling to reach the required region. CAD-based navigation and alignment markers can then help guide the beam to the correct location. As dimensions continue to shrink, accurate beam placement, controlled milling and reliable endpoint detection become increasingly important for avoiding damage to neighboring structures.
Click here to find vendors providing FIB circuit edit.
