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Featured Vendor

GEDEC

Italy

GEDEC (GEnova DEsign Center) is an independent electronic system and integrated circuit design house, mainly focused in advanced electronic and ICs microelectronics design.

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E.K.S.S Microelectronics

Israel

EKSS Microelectronics was established in 2002 and provides Complex IC Product and Test Engineering, Assembly,Supply Chain Services & Consultancy to the Fabless Semiconductor & IC Design House community.

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QP Technologies

USA

QP Technologies provides wafer prep, prototype and small-volume IC packaging and assembly services. We specialize in delivering full turnkey solutions.

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EquipIC Supply Chain

The Netherlands

ASIC supply chain partner with competitive solutions for IC manufacturing, packaging and test, lower volumes are welcome too.

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MinDCet

Belgium

MinDCet specializes in high-voltage, mixed-signal and power ASIC design and possesses internal production testing facilities for comprehensive solutions .

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TSMC

TSMC

Taiwan

Established in 1987, TSMC is the world's largest dedicated semiconductor foundry.

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Semiconductor News

IC Package Types and How to Choose One?

IC Package Types and How to Choose One?

CEO Talk: Bram De Muer of ICsense

CEO Talk: Bram De Muer of ICsense

Multi Project Wafer (MPW) Service and Price

Multi Project Wafer (MPW) Service and Price

VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification

VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification

What does a VLSI Engineer do?

What does a VLSI Engineer do?

What is an ASIC Engineer?

What is an ASIC Engineer?

ASIC Design: From Spec to Chips

ASIC Design: From Spec to Chips

Understanding CoWoS Packaging Technology

Understanding CoWoS Packaging Technology

Latest Articles

ASIC Design

CEO Talk: Bram De Muer of ICsense

CEO Talk: Bram De Muer of ICsense

What does a VLSI Engineer do?

What does a VLSI Engineer do?

What is an ASIC Engineer?

What is an ASIC Engineer?

IP Cores

VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification

VeriSilicon’s complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification

QuickLogic Signs 7-Figure eFPGA IP Contract for GlobalFoundries’ 12LP Process

QuickLogic Signs 7-Figure eFPGA IP Contract for GlobalFoundries’ 12LP Process

Noesis Technologies releases its Ultra High Speed FFT/IFFT processor IP Core

Noesis Technologies releases its Ultra High Speed FFT/IFFT processor IP Core

ASIC Industry Market Trends

Introduction to eDRAM

Introduction to eDRAM

CEO Talk: Michael Dube, EVP at Rochester Electronics

CEO Talk: Michael Dube, EVP at Rochester Electronics

HaiLa Technologies Showcases First Wi-Fi-based Extreme-low-power Backscatter Chip, Developed in Partnership with Presto Engineering

HaiLa Technologies Showcases First Wi-Fi-based Extreme-low-power Backscatter Chip, Developed in Partnership with Presto Engineering

Wafer and Foundries

Multi Project Wafer (MPW) Service and Price

Multi Project Wafer (MPW) Service and Price

Global Top 10 Foundries Q4 Revenue Up 7.9%, Annual Total Hits US$111.54 Billion in 2023

Global Top 10 Foundries Q4 Revenue Up 7.9%, Annual Total Hits US$111.54 Billion in 2023

Semiconductor Foundry Revenue 2023-2024

Semiconductor Foundry Revenue 2023-2024

Packaging

IC Package Types and How to Choose One?

IC Package Types and How to Choose One?

Understanding CoWoS Packaging Technology

Understanding CoWoS Packaging Technology

First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering

First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering

Verification

The Ultimate Guide to ASIC Verification

The Ultimate Guide to ASIC Verification

Sankalp Semiconductor Announces Availability of Automated Analog Validation Services Environment – SAVE

Sankalp Semiconductor Announces Availability of Automated Analog Validation Services Environment – SAVE

Constrained Random Verification flow strategy

Constrained Random Verification flow strategy

Testing

First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering

First OSAT in the Middle East: Israel Strengthens Semiconductor Independence by Uniting iNPACK Expertise with ATS Engineering

Presto and T&W Engineering Announce Long-Term Partnership to Advance Wearable Brain Sensing

Presto and T&W Engineering Announce Long-Term Partnership to Advance Wearable Brain Sensing

Presto Engineering Announces its Collaboration with Nokia as Part of France 2030 Investment Plan

Presto Engineering Announces its Collaboration with Nokia as Part of France 2030 Investment Plan

Qualification

Managing Space Grade RF Device Qualifications

Managing Space Grade RF Device Qualifications

Criteria Labs Expands Manufacturer’s Representatives to Better Serve Customers Throughout the United States and Canada

Criteria Labs Expands Manufacturer’s Representatives to Better Serve Customers Throughout the United States and Canada

Understanding High Temperature Storage Life (HTSL) in IC Qualification

Understanding High Temperature Storage Life (HTSL) in IC Qualification

Supply Chain

CEO Talk: Michael Dube, EVP at Rochester Electronics

CEO Talk: Michael Dube, EVP at Rochester Electronics

The Economics of ASIC

The Economics of ASIC

Obsolete Chips – The Ultimate Guide

Obsolete Chips – The Ultimate Guide

Failure Analysis

FIB Circuit Edit

FIB Circuit Edit

Best Practices: IC Troubleshooting & IC Failure Analysis

Best Practices: IC Troubleshooting & IC Failure Analysis

Focused Ion Beam (FIB)

Focused Ion Beam (FIB)