EnSilica is a leading fabless design house focused on custom IC design and supply. The company has world-class expertise in delivering analog, mixed signal and digital IC’s to its customers globally in the consumer, automotive, communications, and industrial markets.


EnSilica’s core competencies cover: sensing and control, low power design, radio & RF and on chip security. In addition, EnSilica has developed a portfolio of IP cores that can be used within customer designs to deliver a high quality and silicon proven solution in several key application areas including cryptography, communications, connectivity, analog and radar processing IP.


EnSilica has a track record in delivering high quality solutions to demanding industry standards and is an ARM approved design partner.


SoC Design

When developing new System on Chip (SoC) devices our experienced teams can deliver turn-key design solutions including chip specification, digital design, analog/mixed signal, RF design and test development.

Supply Chain Management

EnSilica offers fabless customers a complete Volume Production Delivery service from GDSII tape-out to volume production including: process and vendor selection, packaging development, test and qualification, volume production delivery and supply logistics.

ASIC Services

Our experienced engineering team can provide digital and analog consultancy to help deliver your ASIC design to market including: specification development, system level design, verification, physical design and logical implementation.

FPGA Design

Specialist FPGA expertise that allows us to deliver truly optimal designs that maximize performance and reduce unit costs including FPGA system design and verification.


IP Cores

Processor IP

eSi-RISC is a highly configurable, silicon proven, microprocessor architecture for embedded systems featuring:

  • Configurable 16 or 32-bit, 5-stage pipelined RISC, load-store architecture.
  • Implemented in as little as 8k ASIC gates for minimum 16-bit configuration.
  • Intermixed 16 and 32-bit instructions gives exceptional code density.
  • Uses industry standard bus architecture for IP interconnection (AMBA AXI/AHB/APB).
  • Configurability and custom instructions will deliver a solution with exceptionally low-power.
  • Choice of von Neumann or Harvard memory architecture.
  • Supports user and supervisor modes.

Digital and Analog IP

A broad portfolio of proven digital and analog cores delivering high quality solutions including:


  • ADAS Imaging Radar IP
  • Analog IP
  • Communications IP
  • Connectivity IP
  • Cryptography
  • Floating Point IP