Marquee Semiconductor

In Marquee Semiconductor, we provide ownership of various ASIC and IP designs that include RISC clusters, ARM clusters, and AMBA-AXI-AHB backbones. Our expert architecture and design engineers can collaborate with clients from specifications until design completion.

Our in-house expert team specialises in designing Serdes, PLLs, LDOs, ADCs, DACs and OPAMPS. With multiple years of experience in Analog mixed-signal, custom RF and foundation IP layout, we are able to manage all aspects, from floor planning to packaging and full chip activities within the layout.

Our team knows every element of Spec to GDS II, Signoff activities, EDA flow, and methodology development. We can do any Pre-Silicon design task, from comprehensive turnkey projects to ODC (Offshore Development Center) and on-site consulting services.

Marquee Semiconductor provides highly specialised design for test (DFT) services, covering RTL and architecture, test methodology selection, production platforms, microprocessor-based SOCs, and high-speed I/O such as DDR3/4 & PCI/USB. Our team has extensive experience in multimillion gate designs with multiple clocks & power domains, low power designs, embedded processor-based designs, MBIST for all memory types, complex analog testing, and industry-standard EDA tools from Mentor Graphics, Synopsys, and Cadence. Our services include scan compression, clock control, hierarchical DFT, third-party IP blocks, chip DFx, fault coverage, defect coverage enhancements, and pattern count.

Our project management tool provides a comprehensive solution for managing silicon design projects with cross-functional, global teams. It enables tracking requirements, milestones, deliverables, checklists, tasks, documentation, and issue tracking for each milestone, making it easier to manage complex projects with a mix of analog and digital components.