Pad Limited design

November 21, 2014, anysilicon

A pad limited design is a term used often to describe a unique situation in ASIC design. A pad limited design is when the die size is determined by the number of pads rather by the size of the core. It occurs in cases when the number of pads is relatively high and therefore requires more silicon space. Consensually the die size cannot be smaller even though the core is using only a small area.