Low Cost ASICs, FPGA Conversions, Unify Stacked Die SIPS, Mixed Signal ASICs, High Temperature Circuits, Mature Microcontrollers
80C51 Family, 68HC(7)05 Family, 68HC(7)11 Family, 80C186 Family, 68020 Family
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ASIC Design, Analog / Mixed Signal ASIC Design, RF ASIC & IP Design, Turn-Key Design & Supply Chain Management, IP Development / Verification / Characterization
Pipeline ADC, SAR ADC, RFID Building Blocks, Voltage Regulator
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IP Core development, IP Core customization, System-on-Chip
CPUs and MCUs, Peripherals, Debugging Tools
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ASIC Design and Verification, Physical Implementation, VIP Development, Embedded Systems
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Digital Design Verification (DV), Digital Microarchitecture, Design, & Implementation, Analog Modeling & Mixed Signal (AMS) Verification
Security & Encryption, Standard Interconnect and Communication Protocols
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RTL Design, Place and Route with Timing verification, Package Design, Wafer Fabrication, COT Services
Multi-rate SerDes, BroadR-Reach Compliant Ethernet PHY, AFE, DisplayPort, HDMI, Processor
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ASIC Services, Mixed Signal Services, Spec-in / Turnkey Services
High Speed Serdes solutions, High end, high speed ADC/DAC, Low-Power, Cost-Effective 8- and 16-bit MCUs, Video, Image & Data Compression, MIPI, RF
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Mixed-Signal ASIC Designs Portfolio, ASIC Design, ASIC Testing, Products, Comport Data, Comport Data Contact Form
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SoC Design, Supply Chain Management, ASIC Services, FPGA Design
Processor IP, Digital and Analog IP
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ASIC and SoC design, FPGA and Progammable SoC design, High-end Electronic Board Design, Supply Chain Management
Security and cryptography IPs, JPEG 2000 IPs, JPEG IPs, Memory controllers IPs, MPEG-2 IPs, VC-2 LD, lightweight video compression codec, PCI Express (PCIe) Endpoint DMA - BA611
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UHT™ Image & Video Compression IP, Video Compression IP, Image Compression IP, Cryptographic Functions IP, Controllers IP
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ASIC & FPGA Design & Development, Physical Design and DFT, Hardware Design, Verification & Validation
Reference Designs & EVMs
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