An MPW run is one of the most cost-effective ways to manufacture first silicon when you do not yet need a full dedicated wafer lot. MPW stands for Multi-Project Wafer. Instead of one customer paying for the entire mask set and wafer fabrication process, multiple IC designs share the same masks and wafer run. This allows ASIC teams, startups, IP companies, universities and established semiconductor companies to prototype real silicon at a much lower cost than a dedicated run.

What Is an MPW Run?

An MPW run combines multiple unrelated chip designs into one shared mask set. Each design occupies a defined area on the reticle, and the wafer is fabricated using the same semiconductor process for all participating projects.

After fabrication, the wafer is diced and each customer receives the dies belonging to its own design. The key advantage is cost sharing: rather than paying for all mask and wafer-processing expenses, each participant pays only for its allocated area and associated service.

EUROPRACTICE explains that MPW can reduce the cost of a full prototype wafer run to around 5% to 10% of the original dedicated-run cost in some cases. The exact saving depends on the process, die area, number of participants and service provider, but the principle is the same: several customers share the expensive manufacturing setup.

What Is an MPW Shuttle Run?

The terms MPW run and MPW shuttle run are often used interchangeably. “Shuttle” emphasizes the fact that the run follows a fixed schedule.

A foundry or MPW service provider publishes specific tape-out dates for each supported process. Designers must complete signoff and submit their final layout before the deadline. The provider then combines the submitted designs and launches the shared wafer lot.

This gives MPW an important tradeoff: the cost is lower, but scheduling is less flexible than with a dedicated run. Missing the shuttle deadline may mean waiting until the next available run for that technology.

When Should You Use an MPW Run?

How an MPW Run Works

1. Select the Foundry and Process

The project begins by choosing the process technology that fits the electrical, performance, power, reliability and cost requirements. This can range from mature analog or high-voltage technologies to advanced CMOS and FinFET nodes.

2. Obtain the PDK

The design team needs access to the relevant Process Design Kit, device models, design rules, extraction decks, libraries and foundry-specific documentation. Access normally requires an NDA and an approved commercial or academic route.

3. Choose the MPW Tape-Out Date

MPW runs are scheduled in advance. The design team should select a shuttle window early enough to leave time for final verification, signoff and internal reviews.

4. Complete Design Signoff

Before submission, the design must pass the foundry-required checks. These can include DRC, LVS, density verification, antenna checks, electrical-rule checks and other process-specific requirements.

5. Tape Out

The final GDSII or OASIS data is submitted to the MPW provider before the deadline. The service provider combines multiple projects into a shared mask set.

6. Wafer Fabrication

The shared wafers move through the selected semiconductor process. Fabrication time depends on the technology, process complexity and foundry.

7. Dicing, Packaging and Test

After wafer fabrication, the prototype dies may need wafer sort, dicing, package assembly, final test and characterization. These steps are often separate from the basic MPW fabrication fee.

How Much Does an MPW Run Cost?

There is no universal MPW price. The main cost drivers are the process technology and the amount of mask area used by the design.

Typical cost factors include:

• foundry and process node;
• die size or allocated MPW block area;
• number of metal layers;
• special modules such as RF, BCD, embedded memory or high voltage;
• prototype die quantity;
• packaging and assembly;
• wafer sort and final test;
• characterization and qualification.

MPW fabrication should therefore be treated as only one part of the first-silicon budget. ASIC design, verification, EDA tools, semiconductor IP, package development and test hardware can add significant cost.

MPW Run vs Dedicated Wafer Run

An MPW run is usually the better choice when the objective is learning rather than volume. Once the design is stable and more devices are required, a dedicated wafer run may become more economical on a per-die basis.

Which Foundries Offer MPW Runs?

Many commercial and research foundries support MPW programs, either directly or through shuttle aggregators. Examples include TSMC, GlobalFoundries, UMC, X-FAB, IHP and other specialty foundries.

TSMC calls its MPW program CyberShuttle®. TSMC states that multiple designs share tooling costs through a multi-project mask set, and that CyberShuttle can reduce prototype costs by up to 90% depending on the project. Other foundries and service organizations use different shuttle names and commercial structures.

Because schedules and technologies change, the best approach is to compare available MPW runs by node, tape-out date and process option rather than selecting a foundry based only on name.

How to Choose the Right MPW Run

The cheapest shuttle is not always the best option. Before reserving an MPW run, confirm that the selected process supports the required devices, voltages, memories, IP and reliability targets.

You should also confirm:

• whether enough prototype dies will be delivered;
• the expected fabrication cycle time;
• the tape-out deadline;
• package and test availability;
• the route from MPW to dedicated production;
• long-term availability of the selected process.

What Information Is Needed for an MPW Quote?

You can request an MPW quote before the chip design is completely finished. Useful information includes:

• preferred foundry, if known;
• target process node and process option;
• approximate die dimensions;
• required tape-out timing;
• application type;
• required prototype quantity;
• packaging and test requirements;
• expected annual production volume.

This is normally enough to identify suitable shuttle opportunities and begin a pricing discussion.

Plan Beyond the MPW Run

A successful MPW tape-out is only the beginning of first-silicon development. Before the dies arrive, engineering teams should already have plans for evaluation boards, firmware, characterization, package assembly, test and failure analysis.

The best MPW projects start with clear validation goals. Define what must be measured, which specifications must pass, how many packaged devices are required and what manufacturing decision follows successful first silicon.

Sources

Technical basis: EUROPRACTICE MPW Fabrication services, TSMC CyberShuttle® service information and AnySilicon’s Multi-Project Wafer schedule. Foundry schedules, process options and pricing change over time, so always confirm current availability before planning a tape-out.