SystematIC , as its name aptly suggests, draws its strength from a thorough systematic development methodology and a profound knowledgebase which it applies to practical implementation of every analog and mixed signal ASIC it develops. Thanks to the ‘SystematIC’ methodologies, a fully functional, on-spec first silicon is attainable with minimum number of design iterations and significantly reduced overall development cost and time-to-market.
Applying the ‘SystematIC’ approach entails determining at an early stage of development if an idea is successfully implementable on a mass produce able chip. If yes, deciding how to do the same optimally in terms of electrical performance, cost and development time. In a nutshell, the electrical behavior of external elements is modelled to define an electronic IC architecture with the best processing of the electrical signals. IC’s key aspects of signal, noise, speed and linearity are investigated with available power and process technology. Performance parameters are assessed without full transistor level detail for all circuits.
During the following detailed design phase, all circuits are carefully designed, layouted and verified for all process and environmental conditions. The circuit simulator is used to confirm this overall process and environmental conditions. Layouts are carefully checked with the industry standard tools, including parasitic extraction to confirm on spec operation before first silicon.