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AMBA Bus Overview

April 26, 2018, anysilicon

The Advanced Microcontroller Bus Architecture (AMBA) is an on-chip interconnect that uses an open standard. The AMBA bus connects to and controls the management of peripherals and blocks designed for SoC or System-on-a-Chip. The development of the AMBA bus has had far reaching effects, including the creation of multi-processor designs that use significant numbers of peripherals and controllers.

 

The following figure shows the AMBA bus implementation:

 

However, the AMBA bus goes far beyond devices that are microcontroller based. Its effect reaches a wide-range of applications, including SoC parts that are used in devices such as smartphones, TVs and more. Without the development of AMBA bus, the creation of mobile devices such as tablets and smartphones would be quite difficult to say the least. AMBA is a registered trademark of ARM.

 

How AMBA Bus Works

 

The AMBA bus was designed to address the interconnect for SoC application and have the peripherals interface with each other more efficiently. The purpose of the AMBA bus is to do the following:

 

  • Unify and standardize SoC interconnect IP
  • Enable and promote SoC modular design
  • Easy reuse of IP cores
  • Allow 1st time right development of SoC with one or more embedded CPUs
  • Supports high performance along with low-power communication

The modular design helps to boost the development of IP cores which are technology independent and the reuse of IP cores to help accelerate and reduce cost of future designs.

 

AMBA Bus History

 

The AMBA was first introduced by a company named ARM in 1996. The first buses used in AMBs were the Advanced Peripheral Bus or APB and the Advanced System Bus or ASB. The design was an immediate success, and this was followed in 1999 by the AMBA 2. In this version, the AMBA added a high-performance bus or AHB that used a singular clock-edge protocol which advanced the design of the product.

 

By 2003, the AMBA 3 was created and it introduced the Advanced Extensible Interface or AXI which boosted the performance of the interconnect to an even higher degree. It also brought along the Advanced Trace Bus or ATB which was used on the CoreSight trace solution and on-chip debug. This design lasted for several years until it was surpassed in 2010 by the AMBA 4. This version boosted the AXI to a considerable degree and laid the foundation for newer versions.

 

By 2013, the AMBA 5 came along and provided the Coherent Hub Interface or CHI along with a newly designed high-speed transport application that helped reduce congestions and create a streamlined approached. So potent has the impact of the AMBA been that today the protocols are considered the industry standard for all embedded processors.

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