Dolphin Integration pushes SoC optimization to the next level with all risks managed

June 20, 2016, anysilicon

Minimizing the PCB footprint and the BoM cost implies embedding the Power Regulation Network (PRNet) in the SoC.

Meanwhile, minimizing drastically the SoC power consumption involves implementing several modes of activity to turn on and off different functions of the SoC, which generates noise on the supply lines during mode switching.


Dolphin Integration is pioneering the fabric of PRNet:

Discover the solutions to achieve the lowest power consumption with the smallest silicon area thanks to the mastery of noise propagated on supply lines:



                       – eSR-Niagara, a switching regulator providing the best compromise between  power savings (down to a mere 5 % of energy waste) and small silicon area.

                      – qLR-Aubrey, a linear regulator with an ultra-low quiescent current of 150 nA including the voltage reference, to supply the Always-on Power Domain.

                      – Retention Alternating Regulator (RAR), a unique voltage regulator, first of its kind, which ensures the lowest waste of energy in each power mode – both active and retention – of a power island.

                     –  nLR-Charny, an ultra low-noise linear regulator to supply sensitive analog converters or RF loads.

                      – iLR-Victoria, a linear regulator to supply logic loads or conventional analog loads. It combines small area with fast load transient and fast wake-up time….


  • DELTA Integration Rules, a set of guidelines ensuring that all constraints are addressed at PRNet level.


Pushing SoC optimizations near the limits and risking to improperly size the PRNet is daunting! Dolphin Integration’s voltage regulators, benefiting from the Delta Integration Rules, allow proceeding with a set of unavoidable verifications when dealing with embedded PRNet, and enable SoC designers to determine necessary but not oversized margins.


To easily proceed with the needed verifications, Dolphin Integration enables simulating early in the design flows thanks to EDA Solutions.

dolphin die


About Dolphin Integration

Dolphin Integration contributes to “enabling low-power Systems-on-Chip” for worldwide customers – up to the major actors of the semiconductor industry – with high-density Silicon IP components best at low-power consumption.

The “Foundation IP” of this offering involves innovative libraries of standard cells, register files and memory generators. The “Fabric IP” of voltage regulators, Power Island Construction Kits and their control network MAESTRO enable a flexible assembly with their loads. They especially star the “Feature IP”: from high-resolution converters for audio and measurement applications to power-optimized 8 or 16 and 32 bit micro-controllers.


Over 30 years of experience in the integration of silicon IP components, providing services for ASIC/SoC design and fabrication with its own EDA solutions, make Dolphin Integration a genuine one-stop shop addressing all customers’ needs for specific requests.

It is not just one more supplier of Technology, but the provider of the DOLPHIN INTEGRATION know-how!

The company strives to incessantly innovate for its customers’ success, which has led to two strong differentiators:

  • state-of-the-art “panoplies of Semiconductor IP components” for high-performance applications securing the most competitive SoC architectural solutions,
  •    a team of Integration and Application Engineers supporting each user’s need for optimal application schematics, demonstrated through EDA solutions enabling early performance assessments.

Its social responsibility has been from the start focused on the design of integrated circuits with low-power consumption, placing the company in the best position to now contribute to new applications for general power savings through the emergence of the Internet of Things.

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