Senior Hardware Engineer / Architect with over 20 years experience in the semiconductor industry, defense industry and industrial automation. Extensive knowledge in FPGA and mixed-signal ASIC design, as well as broad competencies in digital and analog signal processing development. High ability to understand and break down complex projects and structures and deliver high-end solutions. Excellent team player in multi-disciplinary teams.


– Cadence frontend and backend tooling (DFII, OpenAccess, Analog Artist, Virtuoso XL, NCsim, pstar, etc)
– Calibre
– Tanner
– Spice
– Verilog AMS