Published Date: February 17, 2026
YO IT CONSULTING, Austin, TX
Job Description:
We are seeking an experienced DFT Engineer to join a well-funded semiconductor start-up in Austin, TX, focused on next-generation SoCs and complex digital and mixed-signal chips. This full-time position involves defining, implementing, and deploying advanced Design-for-Test (DFT) methodologies, contributing to silicon test strategies, and ensuring high test quality for innovative silicon products.
Responsibilities:
- Define and implement SoC DFT strategy and architecture (Scan, ATPG, MBIST, compression).
- Perform scan insertion, compression, hierarchical DFT implementation, and BIST insertion flows.
- Insert and integrate DFT logic including boundary scan, scan chains, compression logic, TAP controller, clock control blocks, and other DFT IPs.
- Integrate MBIST logic and test controllers across hierarchical designs.
- Debug DFT design rule checks and apply fixes to ensure high test coverage and quality.
- Support silicon bring-up, debug, and validation of DFT features on ATE.
- Debug ATPG and compressed ATPG patterns, MBIST, and JTAG issues.
- Work on test plans for analog and mixed-signal IPs.
- Perform fault modeling and coverage analysis.
- Document DFT architecture, methodology, and processes.
- Collaborate cross-functionally with design, verification, and physical implementation teams.
Qualifications:
- Minimum 5+ years of hands-on experience as a DFT Engineer.
- Stable work history (No job hoppers or career breaks).
- Must be willing to work on-site in Austin, TX (5 days/week).
- Must be eligible to work in the U.S. (H1-B sponsorship available).
Skills:
- Strong experience in scan insertion and scan synthesis.
- Experience with compression techniques and hierarchical DFT architecture.
- Proficient in BIST insertion flows (Logic BIST, MBIST).
- Knowledge of TAP controller and boundary scan.
- Familiarity with Tessent and/or Modus scripting and implementation.
- Experience with DFT specification, architecture definition, insertion, and analysis.
- Strong experience in ASIC DFT flows including synthesis, simulation, and verification.
- Excellent analytical, problem-solving, communication, and documentation skills.