EVA DV Engineer

Qualcomm Technologies, Inc. is seeking a Verification Engineer to join its Engineering Group focused on Video Systems and Hardware Architecture. The role involves collaborating with architects, ASIC designers, and software engineers to verify and validate multimedia subsystems for integration into mobile SoCs, particularly in the realm of Computer Vision hardware IP.

Responsibilities:

• Understand the expected functionality of multimedia designs, specifically Computer Vision hardware IP and subsystems.
• Collaborate with architects, ASIC designers, and software engineers to plan and execute verification and validation processes.
• Develop block-level testbench environments using SystemVerilog.
• Implement coverage-driven constrained random verification methodologies.
• Utilize scripting and automation skills to enhance verification processes.

Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science/Engineering, or a closely related field.
• 2+ years of experience with ASIC design and verification tools, techniques, and methodology.
• Master’s degree in a relevant field is preferred.

Skills:

• Strong working knowledge of Hardware Verification Languages (HVLs) such as System Verilog, Verilog, and OO programming.
• Proficiency in programming languages including C/C++, Tcl, Perl, Python, and shell scripting.
• Experience with verification methodologies like UVM or OVM and exposure to Assertion-based Formal Verification.
• Familiarity with AMBA Bus protocols (AXI/AHB/APB) is desirable.