251 Views

HW Post-Silicone Validation Engineer

Published Date: January 09, 2026
Cisco Systems, San Jose, CA
Job Description:

Join Cisco's Post-Silicon Validation Team, where a startup culture meets the resources of a leading networking company. Collaborate with engineers and designers to validate ASICs and shape the future of high-performance networking technology.

Responsibilities:

  • Perform hands-on post-silicon electrical validation in lab environments for networking ASICs and evaluation platforms.
  • Support early-silicon bring-up activities.
  • Execute detailed hardware validation plans covering functionality characterization, performance, and reliability.
  • Set up, configure, and maintain lab benches, boards, and test equipment.
  • Assist with power-on, reset sequencing, clock bring-up, and strap configuration.
  • Perform voltage, current, and signal integrity measurements.
  • Capture and analyze waveforms, eye diagrams, jitter, PDN measurements, and error metrics.
  • Help isolate silicon, board, or signal integrity issues under guidance.
  • Validate Ethernet MAC/PHY and high-speed interfaces such as PCIe and SerDes.
  • Assist with link training, lane margining, and BER testing.
  • Support packet-level validation using traffic generators and protocol analyzers.
  • Operate oscilloscopes, logic analyzers, VNAs, protocol analyzers, and multimeters.
  • Use lab automation tools and scripts to control equipment and capture data.
  • Use thermal chambers and chillers to perform temperature-related tests.
  • Perform minor soldering re-work on test boards.
  • Follow ESD, safety, and lab best practices at all times.

Qualifications:

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • Minimum 3 years of experience (internships, co-ops, or academic lab experience acceptable).
  • Prior experience in electronics, digital logic, and signal integrity concepts.
  • Experience in schematics/Layout files and understanding board-level designs.

Skills:

  • Experience with silicon bring-up or hardware validation labs.
  • Familiarity with DDR5, USB3.0, SGMII, PCIe Gen3.x, USB2.0, eMMC, SPI, MDIO, I2C, UART.
  • Exposure to Ethernet, PCIe, or SerDes testing.
  • Experience with high-speed measurement techniques (eye diagrams, BER, jitter).
  • Lab automation experience (Python).
  • Understanding of networking fundamentals and packet-based systems.

Recent Stories


Logo Image
Privacy Overview

This website uses cookies so that we can provide you with the best user experience possible. Cookie information is stored in your browser and performs functions such as recognising you when you return to our website and helping our team to understand which sections of the website you find most interesting and useful.