Power Management Integrated Circuit [PMIC] Controls Engineer

Claros, an early-stage startup in Torrance, CA, is seeking a Power Management Integrated Circuit (PMIC) Controls Engineer to join its ASIC team. The company specializes in advanced semiconductor power management solutions that enhance AI compute capacity and efficiency. Claros fosters a collaborative and innovative work environment, offering competitive pay, benefits, and stock options.

Responsibilities:

• Develop algorithms for power sequencing, voltage scaling, and control loops for PMICs.
• Collaborate with engineers to define design methodologies and best practices for PMIC design.
• Work with multi-disciplinary teams to implement new ideas and write specifications, design, characterization, verification, and documentation.
• Summarize and interpret results of complex performance checks and review with the team.
• Supervise layout circuit designers, guiding them in floor planning and resolving DRC/LVS errors.
• Design, simulate, and verify power management blocks including LDOs and switching power supplies.
• Collaborate with PCB layout engineers to ensure design performance and quality.
• Draft and review datasheets.
• Work with product managers to develop next-generation products.

Qualifications:

• Bachelor's degree in electrical engineering.
• 3+ years of experience in analog/mixed signal IC design.
• Experience in designing circuits in high voltage (BCD) technology and FinFET technology (12nm and below) preferred.
• Released at least one full IC design from concept to production.

Skills:

• Strong background in power management and circuit design principles.
• Proficiency in Cadence IC Design Tools.
• Familiarity with industry standard interface protocols (SPI, I2C, PMBus/SMBus).
• Strong analytical and problem-solving skills.
• Excellent communication and collaboration skills.
• Ability to prioritize and execute tasks in a high-pressure environment.