Pre-Silicon Digital Verification Engineer

Join Apple's PMU ASIC team to develop custom integrated circuits for current and future products. As a verification engineer, you will collaborate with product teams and architects to refine specifications and create verification plans, ensuring high-quality designs for Apple’s hardware.

Responsibilities:

• Collaborate in developing precise design specifications for digital control blocks.
• Create block and chip level verification plans based on design specifications.
• Architect and create block level verification elements.
• Assist in architecting chip and system level verification environments.
• Develop drivers, tests, reference models, and checkers using System Verilog and UVM.
• Debug test failures and collaborate with designers to implement fixes.
• Utilize formal verification to validate assertions from microarchitecture specifications.
• Track progress and tapeout readiness using functional and code coverage.

Qualifications:

• BS degree and a minimum of 3 years of relevant industry experience.
• Extensive coursework in digital design and computer architecture.
• Foundation in object-oriented programming techniques.
• Experience with System Verilog from lab courses or work experience.
• Familiarity with constrained random verification techniques.
• Knowledge of clock domain crossing design and verification techniques.
• Understanding of digital ASIC development flow.
• Familiarity with power reduction techniques in digital ASICs.

Skills:

• Proficient in System Verilog and UVM.
• Strong debugging skills for test failures.
• Ability to create comprehensive verification plans.
• Experience with formal verification techniques.
• Knowledge of digital mixed signal verification and analog mixed signal simulation.