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Senior Memory Controller Verification Engineer

Published Date: January 22, 2026
NVIDIA, Santa Clara, CA 95050•Hybrid work
Job Description:

NVIDIA is looking for a motivated and creative Senior Verification Engineer to join the Tegra SoC Memory Subsystem IP verification team. This role involves collaborating with design and architecture teams to implement verification strategies, ensuring functional correctness and performance expectations across various product lines, including consumer graphics, self-driving cars, HPC, cloud computing, and AI.

Responsibilities:

  • Develop verification infrastructure including testbenches, BFMs, checkers, monitors, and randoms.
  • Review and drive test plan execution for planned features.
  • Understand performance requirements and create performance test plans for IP.
  • Ensure code and functional coverage of all RTL being verified.
  • Collaborate with FPGA and software teams to ensure comprehensive software testing.
  • Participate in post-silicon verification and debugging.

Qualifications:

  • BS/MS degree or equivalent experience.
  • 3+ years of ASIC verification experience with complex design units.
  • Experience with design and verification tools (e.g., VCS, Debussy, GDB).
  • Familiarity with System Verilog and UVM methodology for ASIC verification.

Skills:

  • Strong C/C++ programming skills.
  • Experience with dynamic memory controllers (DDR2, 3, 4, 5; LPDDR2, 3, 4, 5, 6).
  • Excellent debugging and problem-solving abilities.
  • Scripting knowledge in Python, Perl, or shell.
  • Good interpersonal skills and a team-oriented mindset.

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