Woodcliff Lake, NJ — March 10, 2026 — CAST, a long-established provider of semiconductor intellectual property cores, today announced a new hardware UDP/IP protocol stack IP core that enables data transfer at speeds up to 400 Gbps in ASIC implementations.
Designed for standalone operation, the new UDPIP-400G-ASIC core offloads UDP/IP encapsulation and related protocol processing from host processors, enabling extremely high-speed communication in systems with or without an embedded CPU. The result is a lean, efficient networking solution for ASIC and SoC developers building products that demand very high throughput, low latency, and low power.
The UDPIP-400G-ASIC core is aimed at designs for data centers, AI training and inference fabrics, high-performance computing platforms, storage and server interconnects, SmartNICs, radar and sensor-fusion systems, real-time data-acquisition equipment, backbone networking, media transport, and other data-intensive applications.
“System designers are pushing more data through their silicon than ever before, and they need networking IP that keeps up without adding software burden or integration complexity,” said Dr. Calliope-Louisa Sotiropoulou, networking product manager at CAST. “Our UDPIP-400G-ASIC core gives SoC teams a practical way to add low-power, extremely high-speed UDP/IP connectivity directly into their devices, with the configurability, scalability, and implementation efficiency required for next-generation systems.”
CAST believes the UDPIP-400G-ASIC core is among the industry’s highest-performing standalone UDP/IP hardware stack IP offerings for ASIC implementation. (See the product brief for sample implementation results.)
The new core extends CAST’s proven UDP/IP hardware stack technology into the 400 Gbps class for ASIC use. It supports a rich set of network functions needed for robust deployment, including ARP, ICMP, DHCP, VLAN tagging, multicast capability, UDP/IP checksum generation and validation, and flexible packet filtering. The core is a complete custom hardware stack—not just an accelerator—and once configured it operates autonomously, requiring no CPU assistance whatsoever (it can actually operate in CPU-less systems). With zero software overhead, the core even handles in hardware functions typically left to software, such as DHCP and ICMP.
Designed to support highly parallel, multi-stream architectures, the core supports up to 32 transmit and 32 receive channels. Each channel exposes an independent streaming interface towards the on-chip SoC, which is associated with a specific UDP port on the receive side, and is configurable with destination network parameters on the transmit side.
Built for straightforward SoC integration, the UDPIP-400G-ASIC core supports AMBA® AXI4-Stream™ or Avalon®-ST interfaces for packet data and AMBA AHB™, AXI™, Avalon®-MM, Wishbone, or generic SRAM-like interfaces for control and status functions. CAST supplies the core in synthesizable RTL and encrypted RTL forms, together with a self-checking testbench, scripts, vectors, expected results, and full documentation.
With the introduction of UDPIP-400G-ASIC, CAST expands its Internet Protocol Hardware Stacks family with a solution for designers who need the performance of dedicated UDP/IP hardware processing at the highest data rates. The new core is available now, with flexible licensing terms including royalty-free. Visit the UDPIP-400G-ASIC product page for technical details, or email info@cast-inc.com.
Computer Aided Software Technologies, Inc. (CAST) is a silicon IP provider founded in 1993. The company’s ASIC and FPGA IP product line includes microcontrollers and processors; compression engines for data, images, and video; interfaces for automotive, aerospace, and other applications; networking stacks and offloading engines; various common peripheral devices; and security primitives and comprehensive SoC security modules. Learn more by visiting www.cast-inc.com.
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