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System-in-Package (SiP), a success story

“The demand for SiP[1] has increased significantly in recent years, with an adoption in a wide ranging of applications”, announces Favier Shoo, Technology & Market Analyst at Yole Développement (Yole). “SiP involves low-end including smaller package size & lower I/O count and high-end applications with larger package size & higher I/O. SiP is also leveraging on existing packaging technologies. Hence, supply chain management is more crucial to SiP’s success than the other key factors like materials, technology, and cost”

 

“Many factors are today driving the SiP market’s growth,” comments Santosh Kumar, Principal Analyst & Director Packaging, Assembly & Substrates, Yole Korea“According to Yole’s System-in-Package (SiP) Technology & Market report, market drivers are the increasing adoption of SiP in megatrends[2], the manufacturers’ evolving business models, the growing cost concerns of advanced silicon technology nodes for SoC and the strong advancement in packaging technologies.”

 

The SiP market attained a massive package revenue of US$13.4 billion in 2019, and will grow at a 6% CAGR[3] to achieve US$18.8 billion in 2025. SiP’s biggest market segment is mobile & consumer, showing a 5% CAGR. It is then followed by telecom/infrastructure and automotive segments, with 11% CAGR for both.

 

The market research and strategy consulting company releases this week the SiP Technology & Market report. This analysis presents the overall SiP technologies, all key process steps and technical roadmap. It analyzes the related applications and provides detailed market forecasts by application and packaging platforms for the coming year. In addition, Yole’s analysts are offering a relevant description of the ecosystem, with the overall supply chain, the shifting business models and market shares of the players involved.

 

What are SiP factors of success? Which companies are today following this approach? What are the related business models? What are the business opportunities?… Many conferences with relevant speakers and lot of attendees as well as numerous articles are available today. But many questions are still pending… Yole’s analysts invites you to discover a significant analysis of SiP approach, its technologies and ecosystem and get a deep understanding of the market & technical challenges.

 

SiP market figures are not surprising, since these markets spearheaded most of the new packages where footprint reduction and improved performance were key parameters.

 

Within mobile & consumer, handset held the biggest portion of SiP in 2019. However, the fastest growing momentum comes from other end-devices with smaller market size.

 

“For the next five years, wearables, Wi-Fi routers, and IoT will show significant growth in the SiP market space, with the main drivers being 5G and sensors,” explains Favier Shoo from Yole. “Although handsets (especially smartphones) are saturating the market, there are new opportunities to adopt SiP due to 5G demands.”

 

Within telecom & infrastructure, base stations and servers are both expecting double-digit CAGR growth, with base stations having a whopping 41% CAGR. This is primarily driven by 5G base stations needing more SiP integrated by FC[4] BGA[5]. Also, servers include high-end SiPs like CPU[6], (x)PU[7] (chiplets, Si interposer, FO[8]), and FPGA[9].

 

For automotive & transportation, ADAS[10] and infotainment are the main drivers. Although the camera is a very small portion, its growth is the highest with expected SiP platforms adopted for ADAS mono, stereo, and triple. Also, computing power is needed for VPU[11] and infotainment. The bulk of it is MEMS[12] & sensors, which consists of applications like pressure, IMUs[13], optical MEMS, microbolometers, oscillators, and environmental sensors. For other markets like medical, industrial, and defense & aerospace, the SiP size is significantly smaller, although growth is reasonably strong in robotics and IoT-related applications.

 

“SiP presents several advantages and lot of leading companies already identified them,” analyzes Santosh Kumar from Yole. “They are form factor reduction, increased performance and functional integration with EMI[14] isolation, design flexibilities compared to stand-alone packages/SoC[15], and lower cost.”

 

As an example, the leading smartphones manufacturer Apple selected SiP adoption for components in Apple Watch S4 Cellular. System Plus Consulting, partner of Yole Développement points out this strategic technical choice with a detailed physical analysis of the device. Apple Watch S4 Cellular’s SiP approach of having double side molding technology for the PMIC has enabled the package footprint of the component with passives to shrink by 37%. Furthermore, the passives are hence placed closer to the PMIC for better performances. Results are available in the Advanced packaging technology in the Apple Watch Series 4’s System-in-Package reverse engineering & costing report.

 

 “Since 2015, Apple has released five different generations of smartwatches,” details Stéphane Elisabeth, PhD. Technology & Cost Analyst from System Plus Consulting from System Plus Consulting. “Each generation was built around a System-in-Package integrating all the components from the application processor to PMIC[16]. With this fourth generation, several supplying companies have integrated their latest advanced packaging technology in order to offer the smallest and most integrated SiP since the beginning of the Apple Watch Series. In doing so each company, from foundries like TSMC to OSAT[17] companies like ASE, has shown their HVM[18] capabilities.”

 

Presently, flip-chip and wire-bond technologies are being leveraged in high-end and low-end SiP applications, 2D/2.5D/3D heterogeneous SiP.

 

Low-end SiPs are driven by form factor and performance for 5G and connectivity.

 

High-end SiPs are driven by cost reduction, hence the birth of chiplets by industry and the lack of large IC[19] substrate supply in the market. With the latest surge in demand for higher-end at larger-sized package, manufacturers have commenced a new wave of unprecedented investment tailored for FC & WB[20] SiP. Also, OSATs’ uniqueness allows for a smoother re-position in order to gain capabilities for full turnkey SiP solution in a FC & WB SiP ecosystem.

 

The flip-chip & wire-bond SiP (FC & WB SiP) market is valued at US$12.2 billion (which accounts for more than 90% of SiP packaging revenue), and it is expected to reach US$17.1 billion by 2025, growing at a 6% CAGR between 2019 and 2025. FC & WB SiP lead the way to create value for both low-end and high-end applications, and generate new opportunities in the supply chain.

 

FO packaging has emerged as one of the main packaging options for SiP. However, SiP’s potential in FO is still fairly limited by yield-cost concern with multi-die processing. As a result, players that are currently exploring and manufacturing FO SiP products are already active fan-out players with strong know-how and production maturity. This market has been dominated by TSMC since 2017, with >90% market share in FO SiP for 2019. The key application for fan-out SiP will remain mobile & consumer. However, data centres, 5G, and autonomous vehicle trends will drive fan-out SiP adoption in the telecom, infrastructure, and automotive applications.

 

ED[21] technology is moving from a single embedded die into multiple embedded dies. The complexity and size of IC substrate and board will increase, therefore the ASP for some applications in certain markets will appreciate. ED SiP growth in units will be around 27% over the 2019 – 2025 forecast period, while ED SiP packaging revenue will exceed US$310 million by 2025. Automotive, telecom & infrastructure, and mobile will account for majority of this revenue. Although ED SiP packaging revenue is very small, the growth rate is very strong…

 

A detailed description of both reports, System-in-Package (SiP) Technology & Market and Advanced packaging technology in the Apple Watch Series 4’s System-in-Package is now available on i-Micronews, advanced packaging reports section.

The semiconductor & software team from Yole is attending a selection of trade shows & conferences all year long. Analysts propose valuable presentations to point out the industry evolution and technical innovation.

 

Save the date right now to attend 16th International Conference and Exhibition on Device Packaging – IMAPS DPC (AZ, USA – March 2-5, 2020)

 

Stay tuned on i-Micronews to follow our activities including webcasts, articles, interviews, reports and more!

 

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