Transmission Electron Microscopy (TEM) is one of the highest-resolution physical-analysis techniques used in semiconductor failure analysis. It allows failure analysts to examine extremely small structural and material anomalies that may be impossible to characterize using optical microscopy or conventional SEM alone.
TEM works by transmitting a high-energy electron beam through an extremely thin section of the semiconductor device. The transmitted and scattered electrons can then be used to create detailed images of the internal structure of the sample.
TEM can be used to investigate semiconductor defects involving:
→ Interconnect interfaces
→ Contact and via structures
→ Voids in metal lines
→ Crystallographic defects
→ Dislocations and stacking faults
→ Particles and stringers
→ Thin-film interfaces
→ Nanoscale material anomalies
→ Transistor structures
→ Dopant-profile related investigations
TEM is usually applied after electrical testing and fault-localization techniques have already reduced the suspected failure to a small Region of Interest. The success of the TEM investigation depends heavily on preparing the sample through the correct defect location.
What Is Transmission Electron Microscopy?
Transmission Electron Microscopy uses a high-energy electron beam that passes through a very thin specimen.
In semiconductor failure analysis, electron energies commonly fall in the approximate range of 80 to 300 keV.
As the electron beam passes through the sample, several types of beam-specimen interaction occur. Some electrons travel through the material with little change, while others are scattered or lose energy.
These interactions can generate information including:
→ Transmitted electrons
→ Elastically scattered electrons
→ Inelastically scattered electrons
→ X-ray photons
→ Other electron signals
Different TEM imaging and analytical modes use different parts of these signals to reveal semiconductor structure, crystallography and elemental composition.
Why TEM Is Important in Semiconductor Failure Analysis
Semiconductor devices continue to contain smaller features and increasingly complex three-dimensional structures. As device dimensions shrink, many physical defects become too small or too subtle to characterize conclusively with lower-resolution techniques.
TEM provides both very high spatial resolution and a wide range of analytical capabilities.
Depending on the analysis mode, TEM can provide information about:
→ Physical structure
→ Crystal structure
→ Interface quality
→ Layer thickness
→ Material composition
→ Element distribution
→ Nanoscale defect morphology
For this reason, TEM is often one of the final physical-analysis techniques used when the failure analyst needs detailed evidence to determine the actual failure mechanism.
How TEM Fits Into a Semiconductor Failure Analysis Workflow
TEM normally should not be the first technique applied to a failing semiconductor device.
The TEM sample is extremely small, and preparing it is an irreversible destructive process. The failure must therefore be localized as accurately as possible before TEM preparation begins.
A typical sequence may be:
Electrical failure verified
↓
Fault localization performed
↓
Region of Interest identified
↓
FIB prepares TEM sample
↓
TEM / STEM imaging
↓
EDS / EELS analysis if required
↓
Physical defect characterized
↓
Failure mechanism determined
↓
Root cause established
If the TEM lamella misses the actual failure site, even extremely high-resolution microscopy may provide no useful answer. Accurate fault localization therefore remains essential.
TEM Sample Preparation
A semiconductor sample must be sufficiently thin for electrons to transmit through the Region of Interest.
The goal of sample preparation is therefore to produce an electron-transparent section that contains the suspected defect while preserving the physical structure needed for analysis.
The optimum thickness depends on several factors, including the dimensions of the feature being investigated, the materials in the sample and the TEM technique that will be used.
Important considerations include:
→ Defect dimensions
→ Material density
→ Required image resolution
→ Required elemental analysis
→ Sample-preparation damage
→ Projection of overlapping structures
Why Sample Thickness Matters
TEM sample thickness has a major influence on image quality and analytical performance.
If the section is too thick, several semiconductor features may overlap in the transmitted image. Because TEM normally produces a two-dimensional projection through the sample thickness, overlapping three-dimensional structures can make interpretation difficult.
Very thick samples also increase the probability of multiple electron-scattering events. This reduces transmitted signal quality and adds background to the image.
However, extremely thin samples can also be problematic because sample-preparation damage may represent a larger fraction of the remaining material.
For advanced semiconductor structures, the required electron-transparent section may need to be only a few tens of nanometers thick or even below approximately 10 nm for certain applications.
High-Resolution TEM Sample Requirements
High-Resolution TEM, commonly called HRTEM, places especially demanding requirements on the TEM sample.
To take advantage of sub-nanometer phase-contrast imaging, the sample generally needs to be very thin and have minimal preparation-induced damage.
Low-energy ion milling can be used during the final preparation stages to reduce the amorphous damage layer created by higher-energy ion milling.
Sample thickness therefore cannot be selected independently of the type of TEM analysis that will follow.
FIB TEM Sample Preparation
Focused Ion Beam (FIB) preparation has become particularly important for semiconductor TEM analysis because it enables site-specific sample preparation.
After fault localization identifies a small suspect area, FIB can remove material around that specific location and create a thin lamella containing the defect.
A simplified FIB-TEM preparation process is:
Failure site localized
↓
Region protected if required
↓
FIB removes surrounding material
↓
Thin lamella created
↓
Lamella separated from device
↓
Sample transferred to TEM support grid
↓
Final thinning performed
↓
TEM analysis begins
The ability to prepare a sample from a precise physical location is one of the major reasons FIB and TEM are frequently used together in advanced semiconductor failure analysis.
FIB Lift-Out for TEM
A common preparation approach is known as FIB lift-out.
Material surrounding the Region of Interest is milled away until a thin section remains. The lamella can then be detached from the semiconductor structure and transferred to a TEM grid.
Modern FIB-SEM systems can combine ion milling with electron-beam imaging, allowing the analyst to monitor preparation while approaching the target structure.
A micromanipulator can be used to extract the lamella and position it onto a support grid before final thinning.
FIB-Induced Damage in TEM Samples
TEM sample preparation can itself introduce artifacts.
Ion-beam milling may damage the outer surfaces of the TEM lamella and create amorphous material. If the remaining sample becomes extremely thin, preparation damage can interfere with interpretation of the actual semiconductor structure.
Low-energy finishing steps can reduce this damage.
This distinction is critical during failure analysis because the analyst must separate a defect that existed in the original semiconductor device from an artifact created during sample preparation.
Plan-View TEM vs. Cross-Section TEM
Two important semiconductor TEM sample geometries are plan-view TEM and cross-sectional TEM.
Plan-View TEM
In plan-view TEM, the electron-transparent section is oriented approximately parallel to the surface of the semiconductor die.
Plan-view analysis is particularly useful when a defect is laterally distributed or primarily confined to a particular layer. Examples include:
→ Dislocations
→ Stacking faults
→ Particles
→ Stringers
→ Localized spikes or anomalies
Plan-view analysis can also be valuable for refining the precise lateral position of a very small defect before extracting a second cross-sectional TEM sample.
Cross-Section TEM
In cross-sectional TEM, the electron-transparent section is oriented approximately perpendicular to the semiconductor surface.
This is particularly useful when the defect:
→ Exists at an interface
→ Extends through several material layers
→ Involves an interconnect stack
→ Involves voiding inside a metal line
→ Connects normally isolated structures
The appropriate orientation should be selected according to the failure signature and the expected physical geometry of the defect.
Using Plan-View and Cross-Section TEM Together
For very small defects, both sample orientations may be required.
A plan-view TEM sample may first be used to identify the precise lateral location of an anomaly. Once that site is established, a second cross-sectional TEM sample can be extracted through the defect.
The process becomes:
Electrical fault localized
↓
Plan-view TEM identifies physical anomaly
↓
Exact defect position established
↓
Cross-sectional sample extracted
↓
Interface and vertical structure analyzed
↓
Elemental analysis performed if required
This combination can be particularly valuable in advanced technologies where the defect dimensions approach the dimensions of the device structures themselves.
Conventional TEM Imaging
In conventional TEM, the electron beam illuminates the thin sample and transmitted or scattered electrons are used to form an image.
Different imaging conditions emphasize different properties of the semiconductor material.
Important contrast mechanisms include:
→ Diffraction contrast
→ Phase contrast
→ Mass-thickness contrast
Understanding which contrast mechanism is producing an observed feature is important because not every dark or bright region represents a physical defect.
Diffraction Contrast
Crystalline semiconductor materials diffract electrons according to their crystal structure and orientation.
Small disruptions to that crystal structure can modify the diffraction condition and produce image contrast.
Diffraction contrast is therefore particularly useful for investigating crystallographic defects such as:
→ Dislocations
→ Stacking faults
→ Crystal defects
→ Some interface anomalies
→ Structures that disturb normal crystallography
This makes TEM particularly valuable when an electrical failure is associated with damage inside crystalline silicon rather than an obvious macroscopic structural defect.
Electron Diffraction
Electron diffraction provides information about the crystal structure of the material being examined.
Diffraction patterns can help determine whether a material is crystalline, identify crystal orientation and support identification of phases or structural abnormalities.
In failure analysis, diffraction information can therefore complement direct imaging when the defect changes the normal crystalline structure of the semiconductor.
High-Resolution TEM and Phase Contrast
High-Resolution Transmission Electron Microscopy (HRTEM) can provide extremely high spatial resolution.
Under suitable conditions, phase-contrast imaging can resolve features on the sub-nanometer scale.
HRTEM can therefore support investigations involving:
→ Very thin interfaces
→ Nanoscale material layers
→ Crystal-lattice abnormalities
→ Sub-nanometer structural defects
→ Precise layer and interface metrology
Because phase-contrast interpretation depends strongly on sample thickness, focus and imaging conditions, sample quality is particularly important.
Mass-Thickness Contrast
TEM image contrast can also arise because different materials scatter electrons differently.
Regions containing materials with different average atomic weights, densities or thicknesses can therefore appear with different contrast.
Mass-thickness information can help distinguish material layers and identify unexpected structures within semiconductor devices.
What Is STEM?
Scanning Transmission Electron Microscopy (STEM) is an important TEM operating mode widely used in semiconductor failure analysis.
Instead of illuminating a large sample area with a parallel electron beam, STEM focuses the electron beam into a small probe and scans that probe across the sample.
The basic process is:
Electron beam focused to small probe
↓
Probe scanned across TEM sample
↓
Transmitted or scattered electrons detected
↓
Signal converted into image pixels
↓
High-resolution STEM image created
The spatial resolution is strongly influenced by the size of the focused electron probe.
Why STEM Is Useful in Semiconductor FA
STEM has several advantages for semiconductor failure analysis.
It can provide useful imaging from samples that are thicker than would be ideal for some conventional high-resolution TEM methods.
STEM also supports several specialized detector geometries that reveal different characteristics of the semiconductor structure.
These include:
→ STEM Bright Field
→ Annular Dark Field
→ High-Angle Annular Dark Field
→ STEM-EDS elemental mapping
→ STEM-EELS elemental analysis
HAADF and Z-Contrast Imaging
High-Angle Annular Dark Field (HAADF) is particularly useful in semiconductor STEM analysis.
Electrons scattered to relatively high angles are collected using an annular detector.
The resulting image can provide strong atomic-number or mass-related contrast, often referred to as Z-contrast.
This can be extremely useful when examining material interfaces containing elements with significantly different atomic numbers.
High-resolution STEM-HAADF imaging is particularly useful for delineating subtle interface defects.
TEM for Interface Defects
Interfaces between semiconductor materials can have a major impact on device performance and reliability.
A very thin unintended layer at an interface may produce significant electrical resistance even though the physical anomaly is extremely small.
TEM can help investigate:
→ Unexpected interface layers
→ Amorphous material between conductive structures
→ Interface discontinuities
→ Abnormal layer thickness
→ Crystallographic disruption at interfaces
Combining high-resolution imaging with elemental analysis can help determine both the structure and composition of the anomaly.
TEM for Interconnect and Metal-Line Defects
Modern integrated circuits contain complex multilevel interconnect structures.
A failure may originate from a defect that is only a few nanometers across but significantly affects electrical resistance or connectivity.
TEM can help characterize defects such as:
→ Metal-line voiding
→ Abnormal metal interfaces
→ Resistive interfacial layers
→ Particles connecting isolated structures
→ Stringers
→ Localized material anomalies
Cross-sectional TEM is particularly useful when the defect spans several layers of the interconnect structure.
TEM for Via and Contact Analysis
Contacts and vias provide electrical connections between device structures and interconnect layers.
If electrical testing or fault localization indicates a resistive contact or via, TEM may be used after site-specific FIB preparation to examine the interface in detail.
Potential physical findings can include:
→ Unexpected interfacial material
→ Voiding
→ Structural discontinuity
→ Abnormal interface morphology
→ Material-composition anomalies
The TEM result should always be correlated with the original electrical failure rather than interpreting structural differences in isolation.
TEM for Crystallographic Defects
Silicon and other semiconductor materials have well-defined crystal structures.
Defects within that crystal can affect electrical characteristics and device reliability.
TEM diffraction-contrast imaging can reveal crystallographic defects including:
→ Dislocations
→ Stacking faults
→ Local crystal disturbances
→ Defects that interrupt normal lattice structure
Plan-view TEM can be particularly useful when these defects extend laterally within the substrate.
TEM and Elemental Analysis
Imaging reveals the physical structure of a defect, but determining root cause may also require identifying what the defect is made of.
TEM can be combined with several analytical techniques for elemental and chemical characterization.
Important techniques include:
→ Energy Dispersive X-Ray Spectroscopy (EDS)
→ Electron Energy Loss Spectroscopy (EELS)
→ Energy-Filtered TEM (EFTEM)
TEM-EDS Analysis
Energy Dispersive X-Ray Spectroscopy (EDS) detects characteristic X-rays generated when the electron beam interacts with the sample.
These X-rays can be used to identify the elements present in the Region of Interest.
TEM-EDS can help investigate:
→ Unexpected material at an interface
→ Foreign particles
→ Material-composition differences
→ Interconnect composition
→ Element distribution through device structures
EDS can also be combined with STEM to generate elemental line scans or two-dimensional composition maps.
What Is EELS?
Electron Energy Loss Spectroscopy (EELS) analyzes electrons that lose energy while passing through the TEM sample.
The amount of energy lost contains information about the material through which the electrons traveled.
EELS can provide superior energy resolution for certain applications and can be particularly valuable for the analysis of lighter elements.
However, EELS generally places demanding requirements on sample thickness and sample quality.
EDS vs. EELS in Semiconductor TEM Analysis
| Technique |
Strength in Semiconductor FA |
Important Consideration |
| EDS |
Elemental identification and mapping; can tolerate somewhat thicker or imperfect TEM sections |
Energy resolution can limit separation of some elemental signals |
| EELS |
High energy resolution and strong capability for light-element analysis |
Requires a relatively thin, high-quality sample |
| STEM-EDS / STEM-EELS |
Elemental line scans and two-dimensional maps correlated with nanoscale structure |
Results depend strongly on sample quality and analytical conditions |
The techniques are often complementary rather than interchangeable. The appropriate method depends on the defect, materials present and sample condition.
Energy-Filtered TEM
Energy-Filtered Transmission Electron Microscopy (EFTEM) uses the energy distribution of transmitted electrons to improve imaging or generate material-specific information.
Zero-loss EFTEM can help improve contrast in some thicker or imperfect semiconductor TEM samples by reducing contributions from inelastically scattered electrons.
Energy-filtered imaging can also be used to create elemental maps at selected electron-energy-loss ranges.
As with EELS, increasing sample thickness can reduce the reliability of some EFTEM elemental-analysis results.
Electron Holography in Semiconductor Analysis
Electron holography is a specialized TEM technique that can provide information beyond conventional structural imaging.
In semiconductor analysis, electron holography can be used to visualize electrical potential associated with dopant profiles in transistor source and drain regions.
The sample requirements are particularly demanding, and preparation-induced damage must be carefully minimized.
Low-energy FIB finishing can therefore be important when preparing samples for this type of analysis.
TEM for Advanced Semiconductor Technologies
Advanced semiconductor technologies create increasing challenges for physical failure analysis.
As device features shrink and structures become increasingly three-dimensional, a conventional two-dimensional TEM projection can contain overlapping information from several features.
This makes precise sample preparation increasingly important.
Advanced-device TEM analysis may require:
→ Extremely thin TEM sections
→ Precise FIB positioning
→ Low-energy final milling
→ Plan-view localization followed by cross-section TEM
→ STEM-HAADF imaging
→ Elemental mapping
The smaller the failure site becomes, the more important it is that fault localization and sample preparation work together.
The TEM Projection Effect
A conventional TEM image is fundamentally a two-dimensional projection of a three-dimensional object.
If several semiconductor structures overlap through the thickness of the TEM sample, the final image may combine information from all of them.
This is known as the projection effect.
The issue becomes increasingly important in devices with complex three-dimensional architectures.
Reducing sample thickness can reduce unwanted overlap, while three-dimensional STEM tomography can be considered when true three-dimensional structural information is required.
3D STEM Tomography
Three-dimensional STEM tomography can help overcome some of the limitations of conventional two-dimensional projection imaging.
Images are acquired from multiple sample angles and computationally reconstructed to create a three-dimensional representation of the structure.
This can help the analyst understand the true geometry of defects in complex three-dimensional semiconductor structures.
Analytical tomography can also be extended toward three-dimensional elemental information in appropriate cases.
TEM vs. SEM
TEM and SEM are both electron microscopy techniques, but they perform different roles in semiconductor failure analysis.
SEM
SEM is highly useful for:
→ Surface morphology
→ Cross-sectional inspection
→ Larger-area defect examination
→ Relatively rapid physical inspection
TEM
TEM is particularly valuable when the analysis requires:
→ Much higher spatial resolution
→ Crystal-structure information
→ Nanoscale interface characterization
→ High-resolution elemental analysis
→ Sub-nanometer structural information
A practical workflow may therefore use SEM first to characterize the larger physical region before using FIB to extract a much smaller TEM sample from the most important location.
TEM vs. FIB
FIB and TEM also have very different roles.
FIB prepares and exposes the Region of Interest. TEM provides the detailed nanoscale structural and analytical characterization.
A typical combination is:
Fault localized
↓
FIB navigates to failure site
↓
FIB extracts TEM lamella
↓
TEM / STEM images structure
↓
EDS / EELS identifies composition if required
↓
Root-cause evidence obtained
Without precise FIB preparation, the TEM may never intersect the actual failure site.
Advantages of TEM in Semiconductor Failure Analysis
→ Extremely high spatial resolution
→ Can reveal sub-nanometer structural abnormalities
→ Excellent for material-interface analysis
→ Provides crystal-structure information
→ Supports diffraction analysis
→ Can be combined with STEM
→ Supports EDS elemental analysis
→ Supports EELS and EFTEM
→ Can investigate very small advanced-node defects
→ Can provide strong physical evidence for root-cause determination
Limitations of TEM
TEM Is Destructive
Preparing an electron-transparent TEM sample removes material from the original semiconductor device and is an irreversible process.
Fault Localization Must Be Accurate
The TEM sample represents only a very small physical region. If the sample misses the defect, the analysis may produce no useful failure evidence.
Sample Preparation Can Introduce Damage
Ion-beam preparation can create amorphous damage layers or other artifacts that must not be confused with the original defect.
Sample Thickness Is Critical
Samples that are too thick may contain overlapping structures and excessive electron scattering. Samples that are extremely thin may become dominated by preparation damage.
TEM Produces Projection Images
Conventional TEM collapses three-dimensional information through the sample thickness into a two-dimensional image.
Interpretation Requires Expertise
Diffraction, phase contrast, mass-thickness effects and preparation artifacts can all influence the image. Correct interpretation requires understanding how the sample and imaging conditions produce the observed contrast.
Common Semiconductor Defects Investigated With TEM
| Defect / Failure |
TEM Application |
| Interfacial defect |
High-resolution TEM or STEM-HAADF can characterize thin abnormal layers and interface morphology |
| Resistive contact or interconnect |
Cross-sectional imaging can reveal interface or material anomalies |
| Metal-line void |
Cross-sectional TEM can characterize internal void geometry and surrounding structure |
| Particle or stringer |
Plan-view or cross-sectional TEM can reveal geometry; EDS/EELS can support composition analysis |
| Dislocation |
Diffraction-contrast imaging can reveal crystallographic defects |
| Stacking fault |
Plan-view TEM and diffraction contrast can characterize crystal defects |
| Nanoscale interface anomaly |
HRTEM and STEM can provide sub-nanometer structural information |
| Unknown material |
TEM-EDS, EELS or EFTEM can help determine elemental composition |
| Advanced 3D device anomaly |
Thin-section STEM and, when appropriate, tomography can improve structural understanding |
Typical TEM Semiconductor Failure Analysis Workflow
1. Verify the Failure
Reproduce the electrical or physical failure and establish the failure signature before destructive preparation begins.
2. Localize the Failure
Use appropriate fault-localization methods to reduce the suspected failure to the smallest practical Region of Interest.
3. Select TEM Sample Orientation
Determine whether the expected defect is better investigated using:
→ Plan-view TEM
→ Cross-sectional TEM
→ A combination of both
4. Prepare the TEM Lamella
Use site-specific FIB preparation to extract an electron-transparent section containing the failure location.
5. Minimize Preparation Damage
Apply suitable low-energy finishing techniques when required to reduce ion-beam-induced damage.
6. Perform Initial TEM or STEM Imaging
Examine the physical structure and determine which contrast mechanisms or analytical modes provide useful information.
7. Perform High-Resolution Imaging if Required
Use HRTEM, STEM-HAADF or diffraction analysis when the defect requires nanoscale structural characterization.
8. Perform Elemental Analysis
Where material composition is important, use appropriate techniques such as:
→ EDS
→ EELS
→ EFTEM
9. Correlate With Electrical Failure
Determine whether the physical anomaly observed in TEM is consistent with the original electrical failure signature.
10. Establish Failure Mechanism and Root Cause
Combine structural, elemental and electrical evidence to determine the physical failure mechanism and ultimately the root cause.
Frequently Asked Questions About TEM Failure Analysis
What does TEM stand for?
TEM stands for Transmission Electron Microscopy.
What is TEM used for in semiconductor failure analysis?
TEM is used to characterize very small physical and material defects including interfacial layers, crystallographic defects, metal-line anomalies, particles, stringers and nanoscale semiconductor structures.
Why does a TEM sample have to be thin?
The electron beam must transmit through the sample to form the TEM image. If the sample is too thick, excessive electron scattering and overlapping device structures can reduce image quality and make interpretation difficult.
Is TEM destructive?
Yes. Preparing the electron-transparent TEM sample requires removal of material from the original semiconductor device and is an irreversible process.
Why is FIB used for TEM sample preparation?
FIB allows highly site-specific material removal and can prepare a thin TEM lamella through a previously localized failure site.
What is a TEM lamella?
A TEM lamella is a very thin section of material prepared from the Region of Interest so that electrons can transmit through it during TEM analysis.
What is the difference between plan-view and cross-sectional TEM?
Plan-view TEM examines a thin section approximately parallel to the die surface and is useful for laterally distributed defects. Cross-sectional TEM examines a section approximately perpendicular to the surface and is useful for interfaces and defects extending through multiple layers.
What is STEM?
STEM stands for Scanning Transmission Electron Microscopy. A focused electron probe is scanned across the thin specimen and transmitted or scattered electrons are detected to create the image.
What is HAADF STEM?
HAADF stands for High-Angle Annular Dark Field. It collects electrons scattered to high angles and can provide strong material or atomic-number-related contrast, making it particularly useful for semiconductor interface analysis.
Can TEM identify what a defect is made of?
Yes, when TEM is combined with analytical techniques such as EDS, EELS or EFTEM. These techniques can provide elemental or material information in addition to structural imaging.
What is the difference between TEM EDS and EELS?
EDS analyzes characteristic X-rays generated by the electron beam and is widely used for elemental identification. EELS analyzes the energy lost by transmitted electrons and offers particularly high energy resolution and useful sensitivity to light elements, but generally requires a thinner, high-quality sample.
Is TEM better than SEM?
Neither technique is universally better. SEM is highly effective for surface and cross-sectional inspection over larger areas. TEM provides much higher spatial resolution and additional crystallographic and nanoscale analytical information but requires substantially more demanding sample preparation.
Does TEM find the failure automatically?
No. Successful TEM failure analysis depends heavily on prior fault localization. The TEM sample must contain the actual defect before the microscope can characterize it.
TEM as Part of Semiconductor Failure Analysis
The main value of TEM is not simply that it produces extremely high-resolution images.
Its real value is the ability to combine nanoscale structural imaging, crystallographic information and material analysis at a carefully selected failure site.
The complete process may therefore look like:
Semiconductor device fails
↓
Electrical signature characterized
↓
Fault localized
↓
FIB prepares site-specific TEM lamella
↓
TEM / STEM reveals nanoscale structure
↓
EDS / EELS provides material information
↓
Physical anomaly correlated with electrical failure
↓
Failure mechanism identified
↓
Root cause established
As semiconductor structures become smaller and more three-dimensional, the relationship between fault localization, FIB sample preparation and TEM characterization becomes increasingly important.
TEM is therefore one of the most powerful physical-analysis techniques available when the failure mechanism exists at the nanometer or sub-nanometer scale.
Looking for a TEM Semiconductor Failure Analysis Lab?
If your semiconductor failure requires nanoscale structural analysis, interface characterization, crystallographic analysis or elemental identification, a TEM-capable semiconductor failure analysis laboratory may be required.
Typical requirements may include:
→ Transmission Electron Microscopy
→ High-Resolution TEM
→ STEM
→ STEM-HAADF
→ Plan-view TEM
→ Cross-sectional TEM
→ FIB TEM sample preparation
→ TEM-EDS
→ EELS
→ EFTEM
→ Semiconductor interface analysis
→ Advanced-device physical failure analysis
When requesting TEM analysis, provide information about the device technology, package or wafer condition, electrical failure signature, suspected Region of Interest, previous fault-localization results and the physical or material question that needs to be answered.
The appropriate semiconductor failure analysis provider can then be selected according to the required TEM resolution, STEM capabilities, FIB sample-preparation capability, elemental-analysis equipment and semiconductor-device expertise.
