What Is TSMC MPW?

MPW stands for Multi-Project Wafer. In a normal dedicated wafer run, one customer funds the complete mask set and manufacturing lot. In an MPW run, several independent designs are combined into one shared mask set and fabricated together.

Each participant receives only the dies associated with its own design. Because the expensive mask and wafer setup is shared, the cost of obtaining prototype silicon can be substantially lower than a dedicated run.

TSMC launched the service that became CyberShuttle in 1998. Today, TSMC describes CyberShuttle as a prototyping service covering technologies from 0.5µm to A14, with launch frequency of up to 10 shuttles per month across its portfolio. TSMC also states that CyberShuttle can reduce prototyping cost by as much as 90%, depending on the project and technology.

What Is TSMC CyberShuttle?

CyberShuttle is TSMC’s commercial MPW prototyping program. It allows multiple designs to share tooling costs through a multi-project mask set. The service is designed not only for complete ASIC prototypes, but also for circuit characterization and IP validation.

Typical uses include:

• first-silicon ASIC prototypes;
• analog and mixed-signal circuit characterization;
• processor, interface or memory IP validation;
• standard-cell and I/O library characterization;
• process-compatibility testing;
• research and proof-of-concept chips.

This is particularly valuable when a company needs real silicon data but does not yet need the quantities associated with a dedicated wafer lot.

Why Use TSMC MPW?

TSMC MPW Technology Options

One of the main advantages of TSMC MPW is the breadth of the available technology portfolio. TSMC currently describes CyberShuttle as spanning process technologies from 0.5µm through A14.

That does not mean every process is available on every date. Each technology follows its own shuttle schedule, and different process options may have different launch frequencies.

When selecting a TSMC MPW technology, designers should consider more than the nominal process node. Important factors include:

• core and I/O voltage requirements;
• analog and RF device availability;
• embedded memory options;
• high-voltage or specialty devices;
• metal-stack requirements;
• qualified semiconductor IP;
• performance and power targets;
• future production volume and cost.

A mature node can be the better commercial choice for an analog, industrial or sensor ASIC, while a compute-intensive digital design may require a much more advanced process.

How a TSMC MPW Run Works

A TSMC MPW project generally follows the same design and signoff flow as a dedicated ASIC tape-out, but it must fit a fixed CyberShuttle schedule.

1. Select the TSMC Process

The project starts by choosing the process technology and options that meet the electrical, performance, reliability and cost requirements.

2. Obtain the PDK and Design Environment

The design team needs access to the relevant process design kit, device models, design rules, verification decks, libraries and other foundry collateral. This access may be direct through TSMC or through an authorized service route.

3. Select a CyberShuttle Date

The team chooses an MPW tape-out window that matches the design schedule. TSMC customers can obtain the latest official CyberShuttle schedule through TSMC-Online or their local TSMC representative.

4. Complete Signoff

Before tape-out, the design must satisfy the required foundry checks. Depending on the technology, this can include DRC, LVS, density checks and other process-specific verification.

5. Tape Out and Fabricate

The final layout is submitted before the shuttle deadline. TSMC combines multiple customer designs into the shared mask set and processes the wafer run.

6. Package and Test the Prototype

After wafer fabrication, prototype dies may require wafer sort, dicing, package assembly, final test and characterization. These backend steps should be planned before the silicon arrives.

How Much Does TSMC MPW Cost?

There is no single public price for a TSMC MPW run. Pricing varies substantially according to the selected technology, design area, process options, shuttle date and commercial access route.

The main cost drivers normally include:

• TSMC process technology;
• die or allocated MPW area;
• special process modules;
• number of prototype dies required;
• mask and data-preparation requirements;
• packaging and assembly;
• wafer sort and final test;
• characterization and qualification.

The MPW price is therefore only one part of the total first-silicon budget. ASIC design, EDA tools, semiconductor IP, package engineering and test development may represent significant additional costs.

TSMC MPW vs Dedicated Wafer Run

How Can Companies Access TSMC MPW?

Companies can access TSMC MPW through a direct TSMC relationship or through organizations that provide access to TSMC CyberShuttle and related ASIC services. TSMC lists imec.IC-link as one route offering access to CyberShuttle and production wafers, together with design, qualification, test and packaging services.

The best access route depends on project size, company status, technology, design support requirements and whether the customer needs only wafers or a complete turnkey ASIC supply chain.

From TSMC MPW to Volume Production

A successful TSMC MPW tape-out is normally a development milestone rather than the end of the program. After first silicon is characterized, the design may require a respin or move directly toward qualification and production.

Teams should therefore consider the production path before booking the shuttle. Package selection, production test strategy, yield expectations, IP licensing and long-term wafer supply should all be part of the decision.

The most successful MPW projects have a clear objective: determine exactly what must be demonstrated by first silicon and what decision will follow if the results meet specification.

Sources

TSMC CyberShuttle® service information and TSMC Mask Services; TSMC annual reporting on its Multi-Project Wafer program; imec.IC-link information published through the TSMC Open Innovation Platform partner network. CyberShuttle schedules and technology availability can change, so always confirm the latest run before planning tape-out.