The Netherlands
Chain-IC is a mixed-signal system design company specialized in analog and mixed-signal IC design. Chain-IC offers consultancy, IP development and the full development process of an Integrated Circuit (IC), from customer specification to qualification and supply of tested chips. For specific activities which are not supported in-house, Chain-IC works closely together with partners.
An important focus area of Chain-IC is analog-to-digital and digital-to-analog conversion. ADCs and DACs are often at the heart of a mixed-signal integrated circuit. A wide variety of ADC and DAC topologies exist, all having their advantages and challenges that require a careful trade-off to come to a solution that is optimal for the application. In some cases also hybrid solutions can be interesting to consider, where one can benefit from the strong points of different topologies. Besides ADCs and DACs, Chain-IC also has expertise with several other analog building blocks. The main fields of expertise are listed below.
– Feasibility study & System analysis
– IP development
– High speed SAR ADC’s
– High resolution Sigma-Delta ADC’s and DAC’s
– Resistive, Current and Switched Capacitor DAC’s
– High power class A/B and D audio amplifiers
– LDO and DC/DC converters (Buck/Boost)
– Protection circuitry
– Precision voltage and time references
– Low noise transimpedance amplifiers
– Sensor read-out circuitry (ROIC)
– Actuator drivers
– Signal processing, IIR and FIR filters
– Calibration algorithms
– Analog control logic
– Qualified lab environment
– Measurement equipment
– Thermostreamer
General Description
This IP describes a general purpose Analog to Digital Converter (ADC) for low-power applications. The converter is a charge-redistribution successive-approximation type converter, and it is suitable to operate in a time-interleaved ADC to enable higher sample-rates. As an example, this ADC is applied in a 2.5 GS/s ADC system.
The key feature of this ADC is its low power consumption. Next to this, the full-scale range is programmable and its area is small.
The IP product described in this datasheet is silicon proven. The 2.5 GS/s ADC system in which this ADC is applied fulfills all mass-production consumer electronics requirements.
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General Description
This 14 bits Successive Approximation Register (SAR) ADC achieves 14-bit Capacitive DAC linearity without any calibration technique. The ADC can have a maximum sampling frequency of 2MS/s. Using I/O devices, the ADC can handle an input voltage up to 2.5V.
Although good linearity can be achieved without calibration, backup calibration can be performed to achieve even better performance.
This IP is currently in development.
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Applications
General Description
The CHAINIC_LLSDADC is a high-resolution sigma-delta analog-to-digital converter which achieves a dynamic range of more than 100dB at a power consumption of only 1.6mW.
The latency of the ADC is only one clock cycle (40ns at 25MHz), which makes the converter ideally suited for application in control loops. The low latency is enabled by feeding the bitstream output back to the input via a DAC with build-in filtering. This creates a “tracking ADC behavior”, where the output accurately tracks the input signal inside the signal bandwidth.
Next to enabling low latency, the filtering DAC also makes the system robust towards jitter and other error sources typically associated with 1-bit converters.
The CHAINIC_LLSDADC can convert both single-ended and differential signals with high accuracy. Next to this it can convert signals with amplitudes and biasing levels well outside its own supply level, by using external resistors acting as level shifters.
Due to exclusivity this design has restrictions.
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General description
The SDCRDAC is a 24-bit sigma-delta charge-redistribution digital-to-analog converter (DAC). It is designed to have high absolute accuracy, low flicker noise and low power consumption, and it is robust against temperature variations and radiation. This makes the DAC ideally suited for demanding control applications in a wide variety of environments
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General description
The CRDAC12b is a 12-bit charge-redistribution DAC.
The DAC is especially suited to discrete-time applications, where the output signal is sampled, but also works well in continuous-time applications.
The DAC has been optimized for high speed and low area. It has been designed for applications where DC transfer is not required.
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General Description
The CHAINIC_FIRDAC is a high accuracy sigma-delta digital-to-analog converter. The low out-of-band-noise (OOBN) down to -60dBFS makes the converter ideally suited for application with strict OOBN requirements. The PWM modulator is a special type of 1-bit sigma-delta modulator that produces a pulse width modulated (PWM) signal with a fixed repetition frequency. A fixed repetition rate makes the output signal insensitive to non-linear inter symbol interference (ISI).
The semi-digital FIR filter topology of the FIRDAC makes the FIRDAC behave as a multi-bit DAC. This gives the converter its excellent OOBN and makes the system robust against clock jitter and other error sources typically associated with 1-bit converters while maintaining excellent THD and good matching properties.
The CHAINIC_FIRDAC is ideally suited for digital-to-analog conversion in front of (analog) class-D or class-AB amplifiers. Additionally, this IP can be delivered together with up-sampling and interpolation filters as signal pre-processing.
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