ElectraIC develops ASIC / FPGA, microchip and embedded software/systems, electronic circuit design and verification projects for many companies thanks to its expert team.


In addition to engineering services, ElectraIC develops IP cores and embedded system products. Not only does it offer services, but it also offers opportunities to differentiate with niche products and solutions in its area of expertise.


ElectraIC is a Doulos Certified Training Partner, a world-leading training services company providing the highest quality training services all around the world.


More than 200 different trainings, particularly AMD Xilinx, VHDL, SystemVerilog, UVM, SystemC, ARM, Embedded Linux, Embedded Software, and Deep Learning, are carried out in fully equipped unique training rooms. In this way, it also aims to improve the skills and professional competencies of the teams coming from the customers.



Advanced Verification in IC design means using the latest verification methodologies like UVM, UVVM, OSVVM. Our team has experience using those methodologies in FPGA design of aerospace and defence projects and ASIC design verification projects.


We will generate verification metrics and report them back to you so that you will have proof of the quality of the verification environment. The confidence level of your design will gradually increase as we present the code coverage metrics, such as statements, branches, FSMs, conditions, and expressions in your design code. Functional coverage metrics will also be provided to see how much of your design requirements are covered.




ELECTRA IC takes the ownership of:

  • Building/reviewing your design requirements
  • Generating the Verification Plan according to the requirements
  • Building the verification environment using your preferred verification methodology
  • Implementing the test cases according to the Verification Plan
  • Analyzing code coverage and functional coverage and capturing improvement points in the verification
  • Build new test cases or modify existing ones to increase coverage metrics and finalise the verification project.


Our core competence is Digital IC Design. Hence, we have extensive experience working in ASIC/FPGA or PCB design projects. Just provide us with the system specification, and we can design and verify the ASIC/FPGA and/or PCB. If needed, we can do the mechanical design and production and deliver you the final product.


  • ASIC Design & Verification Services: ELECTRA IC has taken many roles, from system design to sign-off for tape-out in ASIC projects. Some examples are WiFi, BT, and ADSL.
  • IP/VIP Design: IP/VIP Design, Tool Evaluation, IP Evaluation, Training
  • PCB Design & Verification Services: Schematic Design, Schematic Verification, Stack-up Design, Layout, Signal Integrity Analysis, PCB Production & Assembly, PCB Tests
  • FPGA Design & Verification Services: Requirements capture, Requirements tracing during the whole FPGA design flow, RTL Coding, Functional Simulation, Directed Tests, Random Tests using SystemVerilog / UVM, Formal Verification, Place & Route, FPGA Validation in our lab


We can design an embedded system as a part of a complete device system that includes hardware, such as electrical and mechanical components. Unlike the general-purpose computer, the embedded system is engineered to manage a wide range of processing tasks. Because an embedded system is engineered to perform specific tasks, we may optimise size, cost, power consumption, reliability, and performance. Embedded systems require different software design philosophies and disciplines where real-time performance, responsiveness, robustness, resiliency, cost, power, and memory budgets are the main parameters.





  • Understand your embedded system and generate the requirements document
  • Build the Design Architecture and Verification Plan Documents
  • Design the circuit board by selecting the necessary discrete components (Schematic Generation)
  • Coding of the FPGA and/or processor inside the embedded system
  • Design and manufacturing of the mechanical parts and the PCB cards
  • Integration tests and delivery of the final product to you



  • Functional requirements study and analysis
  • Performance requirements study and analysis
  • Chip, technology, SoC, CPU, GPU, Accelerator, real-time operating system selection and pre-work
  • Pre-simulation and real-time performance analysis for the most critical functional blocks
  • Protocol and standards study
  • Software architecture design
  • Software functional design documentation
  • Software development & coding
  • Integration of RTOS and newly introduced chipsets
  • Hardware-software integration
  • Inter-layer software integration3rd party software integration
  • Functional tests
  • System and laboratory, performance, and stress tests
  • Field tests, problem-solving and optimisation
  • Software release
  • Field support and problem-solving during the product lifecycle



Having worked on avionic projects, we had the experience of using DO-254 guidance for electronics hardware development. We know DO-254 objectives and help our customers achieve a successful DO-254 certification. We can help you deploy DO-254 objectives in your electronics hardware development projects.


ISO 26262

We can implement and help you with ISO 26262 standard compliance for automotive electronics hardware development. We can help you on your journey to a successful ISO 26262 certification.


EN 50129

During your EN 50129 process, we can help you generate the related documentation to implement and generate process assurance related to the standard. We can also act as an Independent Verification Team whenever required.




We take the whole ownership of;

  • DO-254 / EN 50129 / ISO 26262 project planning and execution at LRU/CBA/PLD/IP levels
  • DO-254 / EN 50129 / ISO 26262 related document generation
  • Customer’s HW design and/or verification activities




We work with you to deploy;


  • DO-254 / EN 50129 / ISO 26262 Gap Analysis
  • DO-254 / EN 50129 / ISO 26262 compliant validation&verification activities
  • DO-254 / EN 50129 / ISO 26262 related document generation




We support you by providing;

  • DO-254 / EN 50129 / ISO 26262 Gap Analysis
  • DO-254 / EN 50129 / ISO 26262 document consultancy
  • DO-254 / EN 50129 / ISO 26262 Training
  • Guidance throughout the project


  • Electra IC offers courses on specialised topics like functional safety and IC design. DO-254, IC Design Flow and High Reliability are some of the niche areas in which we can provide courses from instructors who are experts in their fields.
  • Electra IC is a Certified Training Partner of global training specialists Doulos. The courses on offer from the Doulos portfolio deliver project-ready skills and expert Know-how in SoC and FPGA Design and Verification, as well as a growing range of Embedded Software courses to meet the challenge of increasing levels of complexity (and R&D costs) in the embedded systems software and hardware market. Scheduled face-to-face public classes are provided in Ankara, as well as customer-specific in-house training and Live Online Training for those with time or travel limitations.


A professional Engineer Training Programme from engineers expert in their fields!


EIC Academy Engineer Training Programme is a probation period programme for recruits. A group of 6 to 10 new engineers goes through an 8-week intensive programme, which includes training on different topics, hands-on project practices, presentation of what has been studied during the training and detailed evaluation feedback given by expert engineers in their fields. Certified Training Instructors deliver the training, projects are mentored by expert engineers and the assessments are conducted by at least three experts. To complete the programme, candidates must successfully pass the overall assessments.


EIC Academy is a professional Engineer Training Program in “Digital Design and Advanced Verification Techniques”.


As part of the EIC Academy, young engineers undergo an 8-week intensive program that includes “training in the field of Digital Design & VHDL and System Verilog & UVM”, “applied projects”, and a detailed “assessment report” prepared by expert engineers in their fields. This allows young engineers to start their business life more equipped.

IP Cores


MIL-STD-1553 IP is an IP Core which implements the MIL-STD-1553B standard and provides a single or multi-functional interface between the host processor and the MIL-STD-1553 bus transceiver.

MIL-STD-1553 IP can function as a Bus Controller (BC), two separate Remote Terminal (RT) and a Bus Monitor (BM) simultaneously.



64K bytes internal static RAM with RAM Error Detection/Correction option

16-bit time tag counters and clock sources for all terminals

64-Word Interrupt Log Buffer

Built-in and optional self-test for protocol logic, digital signal paths and internal RAM

Programmable 50/100 MHz Clock Frequency

DO-254 Compliant certification package



Fully programmable Bus Controller

Bus Controller has 32-bit time count options

Programmable Status Set

Message Format Check

16 Condition Code for all opcode

64-Word General Purpose Queue for external BC Host

Programmable Inter-Message Gap Time (resolution 1us)

Programmable Message Timeout



Two independent Terminal Core

Programmable different buffer modes for all Subaddress

Subaddress-based illegal command declaration

Optional temporary buffer



Basic Bus Monitor (BBM) records commands and data separately, with 16-bit or 48-bit time tagging

Optional support function for IRIG-106 data packets, including full packet headers and trailers

Bus Monitor has 32-bit and 48-bit time count options Message Filter Table


ARINC664 End System IP is an IP Core that implements ARINC664 part 7 and provides interface between aircraft LRUs and ARINC664 network. As an implementation of End System, IP sends the user’s messages of different sizes and different time constraints to their destination with a predictable delay. Since the IP core uses the Ethernet interface when connecting to the network, it takes full advantage of the physical layer functions that Ethernet offers. Thanks to the AXI4 interface provided with IP Core, adaptation can be made between any protocol and ARINC664.



Supports 32 VLs

Adjustable BAG values (1ms to 128ms, 125 us to 32 ms)

Supports 64 Byte as Lmin and 1471 Byte as Lmax

Redundancy enable/disable capability

Integrity Checking enable/disable capability

Outputs error statistic


ARINC664 Switch IP implements ARINC664 part 7 and provides switching functionality within the ARINC664 network. As an implementation of ARINC664 Switch, IP switches/routes messages of different sizes and time constraints to their destination with a predictable delay. Two level of priority can be applied to the VLs during device configuration. Thus, the switch can arrange the data queues according to these priorities. Thanks to the AXI4 interface provided with IP Core, error statistics can be fetched to a desired logic and data injection to the network can be accomplished if desired.



Supports 128 VLs

Adjustable BAG values

Supports 64 Byte as Lmin and 1471 Byte as Lmax

Adjustable message priority (two classes)

Multicasting ability

Outputs error statistic



AXI4 interface for host communication

Two ARINC664 Ethernet interfaces

End System configuration through AXI4 interface

100 Mbps/1000 Mbps Ethernet


ARINC 429 IP Core implements ARINC 429 standard. IP Core contains Rx and Tx processing blocks, Controller Block, Internal Memory and External Memory Interfaces. A429 IP communicates with CPU (Central Processing Unit) and external memory through AXI interface.


IP Core uses the AXI interface as an internal local bus. AXI interface is a 32-bit data bus which has 32-bit addressing and 32-bit read and write channels. IP supports 32 receive channel number and 16 transmit channel number.


The IP is designed to be compatible with DO-254. ARINC 429 IP is field approved.



Supports ARINC 429 Specification

Configurable up to 32 Rx and 16 Tx Channels

Supports 12.5 kbit/s and 100kbit/s data rates

Contains 32-bit local data bus

Contains Individual and Circular buffer area which have 1024 word depth for each channel

Supports single and periodic data transfer

Filter mechanism based on SDI, ESSM, Label of ARINC 429 data

Occurring of filter process in FPGA

Communication with CPU and external memory

Field Approved

DO-254 compliant



Encrypted VHDL source code

ARINC 429 IP Core User Guide

Optional DO-254 Certification Data Package is available



The following licensing models are available:

Encrypted Netlist

Encrypted RTL

Encrypted RTL with DO-254 Certification Data Package



With the initial licensing, customers will receive the following services for the first year:

Half-day “IP Core First Time User Training”

Support during SOI meeting preparations is available with DO-254 Certification Data Package

IP Core update