USA
FortifyIQ develops HW security IP cores fortified against Side-Channel (SCA) and Fault Injection attacks (FIA), while preserving the original AES goals of speed, low latency, and low power usage. We also offer high-performance software libraries and EDA tools for pre- and post-silicon security assessment.
Our core protection algorithm was tested rigorously, passing the Test Vector Leakage Assessment (TVLA) test at 1 billion traces, and was certified by a third-party Common Criteria lab. Our cores are fully synthesizable, eliminating the need for custom cells or special place & route handling. Being algorithm-based, they are technology-agnostic, ensuring compatibility and security across diverse platforms and devices.
Our Advanced AES IP cores provide robust protection against SCA, FIA, (including Differential Power Analysis-DPA, and Statistically Ineffective Fault Attacks-SIFA), alongside high performance, low latency, low gate count, and low power usage. Purely mathematically-driven, these cores achieve a high maximum frequency, and one clock cycle per AES round.
Our FortiCrypt high-performance software library can be used to protect security vulnerabilities in HW in unprotected field devices even though they are already deployed, by a simple software download. They are based on the same security proven algorithm (STORM) as our ultra-low power IP cores, and are silicon proven. They have extremely high performance. Even on a low-end 1.1 GHz ARM processor the performance is high enough for Ultra HD (3840×2160) video streaming.
These HMAC SHA2 cores provide robust protection against SCA, DPA, FIA, and SIFA, are suitable for lightweight applications and are purely algorithmic and thus implementation-agnostic. Our products, including the software library, offer protection of HMAC SHA2, based on the threshold implementation approach, validated analytically and on physical devices.
A Public Key Algorithm coprocessor with modular multiplication and SCA and FIA protection that streamlines operations by eliminating Montgomery domain transformations, enhancing the coprocessor’s performance and reducing area.
A low-cost key exchanger for companies currently using preinstalled symmetric keys due to cost constraints, but are considering shifting to key exchange protocols based on asymmetric cryptography with built-in resistance to SCA and FIA.
Comprehensive pre-silicon and post-silicon security assessment tools, including TVLA charts that pinpoint vulnerabilities down to specific modules and gates, greatly simplifying security debugging against a spectrum of physical attacks, including SCA, DPA, FIA, and SIFA. This effectively moves the security assessment to the same stage as the functional assessment. These tools were instrumental in developing all our secure IP cores and software libraries.
