https://www.smartsocs.com/ https://www.swindonsilicon.com/

IC Enable

USA

Our team has experience in turnkey ASIC and SOC development, technology development, test chip automation, manufacturing logistics and electronics development across the Semiconductor, Consumer Electronics, Medical and Defense industries, including some of the most challenging fabrication processes and product applications in the world.

 

With over 100 years of IC Development success across IC Enable’s leadership team, you can expect your project to be led with expert technical knowledge and precision driven deliverables.

 

Our experience across various industries and skill domains showcases our dedication to innovation and industry leadership. Applications include Neurostimulation, Photoplethysmography, Ultrasound, Video Controllers, Microdisplays, ROICs, Wireless Transceivers, DNA Analysis, Energy Harvesting, Sensor Interface and more.

 

IC Enable has unlocked expanded capabilities through leading Design Partner Networks, enabling us to provide full IC products across design, manufacture and production.

 

IC Enable is based solely in the USA, ISO 9001 Certified and ITAR Compliant.

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Services

Turnkey ASIC / SOC Development

  • Complete solution from design to production manufacture
  • Ecosystem leverages experienced, trusted partners for optimal value tailored to project needs
  • Full turnkey ITAR compliant and long-term flows available
  • FPGA to ASIC, Analog Mixed-Signal ASIC, SOC, MEMS, Digital ASIC expertise in multiple foundry technology solutions
  • Medical, consumer, automotive, and aerospace/defense sectors
  • Foundry, packaging, test, and qualification management

Technology Development Platform

  • Customizable test chip library IP in development since 2013
  • Characterization structures such as FEOL, BEOL, and Spice Modeling, Matching, HV analog and ESD Components
  • Circuit Architecture and array-based test vehicles
  • Proprietary & PCell Automation Coding
  • Turnkey support through PG and test, including new device integration and manufacturing process augmentation
  • Test Chip Automation to enable efficiency and consistency of DoE capture and test module generation
  • Model development and design enablement support
  • Experience across multiple leading technology platforms

Technology Development Platform

  • Customizable test chip library IP in development since 2013
  • Characterization structures such as FEOL, BEOL, and Spice Modeling, Matching, HV analog and ESD Components
  • Circuit Architecture and array-based test vehicles
  • Proprietary & PCell Automation Coding
  • Turnkey support through PG and test, including new device integration and manufacturing process augmentation
  • Test Chip Automation to enable efficiency and consistency of DoE capture and test module generation
  • Model development and design enablement support
  • Experience across multiple leading technology platforms

Analog Circuit Design

  • PMU, LDO, VGA, Comparators, Bandgap
  • SerDes, ADC, DAC, PLL, Codecs
  • RF transceivers, LNA, Oscillators, Switched Capacitors
  • Mixed-signal designs/mixed-mode simulations, Verilog modeling
  • Circuit simulation in SPICE, Spectre, FastSpice

Integrated Circuit Layout

  • Experience in technologies from 250nm to 2nm (FinFET)
  • Foundry technologies include Skywater, TSMC, SMIC, Tower, XFab, GF
  • Experience in analog mixed-signal and custom digital
  • Block level to SoC Floorplanning
  • Low noise designs, Rad Hard, RF, Defense/Space, High Reliability, MEMS, high speed digital, power management

Digital Design (RTL Design) and Verification

  • RTL design in Verilog
  • RTL design from specifications, e.g. UART, I2C, SPI, CAN
  • Functional simulation using VCS, NCSim, Xcelium
  • Design Verification using UVM. Constrained random, coverage driven, assertion based verification. LEC using Formality
  • SOC IP Integration
  • FPGA to custom ASIC conversion (IP and technology selection)

Digital Physical Design

  • Synthesis, SDC constraint development
  • Synopsys Design Compiler, ICC; Cadence Genus, Innovus
  • Floor planning, CTS, STA, timing closure
  • Parasitic extraction, physical verification
  • Scan-insertion, JTAG, Boundary Scan, ATPG
Contact

Contact Info

Address

800 E. Campbell Rd, Suite 101, Richardson, TX 75081, USA

Telephone

+1 214-575-9400

Contact Person

[email protected]

Website

https://ic-enable.com/

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