Mirafra

USA

  • Mirafra is a world-leading Semiconductor design services company.
  • Has extensive experience in end to end project delivery from RTL to GDS II
  • Serving over 50 top Semiconductor clients globally.
  • We are team of 850+ strong engineering Team, a team of ~90+ engineers in US • Expertise in Semiconductor Design, Embedded Software, Application Software and Digital Technologies.
  • Based out of Bangalore with global presence in India, USA, Europe, Singapore etc.…
  • 16 years of trusted and proven track record of serving “Nice Skill” contingent work force requirements, tactical and strategic outsourcing needs.
  • Services:

– Front End – RTL Design, Design Verification, FPGA & Emulation, Post Silicon Validation

– Back End – Synthesis & STA, DFT, Physical Design & Automation, Physical Verification

– Analog Mixed Signal – Mixed Signal Design/Layout, RF Layout, Memory Development

– Std Cell/IO Library

Services

Front End

RTL Design

  • RTL development from Specification
  • Module and Sub-System level RTL design
  • SOC design integration

Design Verification

  • IP/Sub-system
  • SOC
  • Processor
  • VIP
  • Formal
  • GLS

FPGA & Emulation

  • Design
  • Validation
  • Prototyping
  • Emulation

Post Silicon Validation

  • Emulation
  • IP/Sub-System, SOC Functional Validation
  • AMS Bench Characterization

Back End

Synthesis & STA

  • Synthesis for Blocks and SOCs
  • Constraints development
  • Power, congestion and physical aware
  • Timing Budgeting and Closure
  • Timing Closure with X-talk effects, OCVs and ECO’s
  • MMMC based timing optimization

DFT

  • DFT at IP and SOC level
  • ATPG, MBIST, PBIST, IDDQ and DC Para
  • Test time reduction, pattern generation, probe and tester use

Physical Design & Automation

  • Blocks & SOCs level PnR
  • Low Power Implementation
  • PD CAD Support
  • Scripting & Automation support
  • Methodology & flow development

Physical Verification

  • DRC and LVS
  • Antenna
  • Density

Analog Mixed Signal

Mixed Signal Design/Layout

  • Power Management
  • Clock System
  • Data Converters
  • Interfaces, SerDes, DDR and USB

RF Layout

  • RF frontend Rx/Tx
  • LNA, Bias & Mixer

Memory Development

  • Design, Layout & Characterization
  • Custom and Compiler Memories
  • Dual / Single port memories

Std Cell/IO Library

  • Design & Layout
  • Characterization & Modelling