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Sofics is the world leader in IP for robust IC design. Its patented technology is proven in more than 3000 IC designs across all major foundries and process nodes. IC companies of all sizes rely on Sofics for off-the-shelf or custom-crafted solutions to protect analog IOs, overvoltage IOs, high speed, high frequency or other non-standard IOs, and high-voltage ICs, including those that require system-level protection on the chip for ESD, EOS, EMC, radiation or other specifications.
Sofics technology produces smaller solutions than any generic, conventional ESD configuration. It also permits twice the IC performance in high-frequency and high-speed applications. Sofics solutions and services begin where the foundry design manual ends.
Sofics licenses IP to improve the robustness of ICs in the most cost-effective way, without jeopardizing functionality. Currently this is offered in 3 IP portfolio
TakeCharge – ESD/EOS/Latch-up protection for low voltage (up to 5V) and mature/advanced processes (0.18um down to 16nm)
PowerQubic – ESD/EOS/Latchup protection for high voltage (up to 100V) and BCD processes
CustomIO – Circuit solutions, including IO’s, clipping circuit for Antenna applications, ….
IO’s beyond the standard offering, made available in any CMOS/SOI/FinFET technology. In many cases the analog or digital IO’s are targeted to pass difficult robustness specs.
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Sofics’ engineers have a combined experience of over 100 years in designing and fixing ESD/EOS/latch-up issues; using our state-of-the-art lab (TLP, VF-TLP, MKII HBM/LU tester, solid state pulsers, ….), we can help analyze any problem.
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Sofics test lab does not do certified qualification tests or physical failure analysis.
Organized in the TakeCharge IP portfolio, Sofics offers a wide range of ESD/EOS/latch up solutions, silicon proven in a variety of CMSO/SOI/FinFET processes (for a full list). Porting to another process is always possible.
The solutions are optimized for cost, robustness and performance:
Sofics’ PowerQubic IP portfolio offers ESD/EOS/Latch up/EMC solutions for HV and BCD processes.
The solutions are tailored for demanding applications, such as automotive, industrial or medical.
Specifications include
Click here to see in which processes the solutions are silicon proven.
Automotive interfaces can be challenging to design, due to a large set of reliability specifications, such as EMC or automotive disturbances such as described in ISO 7637. Sofics has predeveloped a LIN transceiver (PHY) for 12V batteries, conforming to the LIN specification document (ISO 179870), including driver, ESD protection, EMC protection etc. (LIN controller not included)
The PHY can be ported to any process. Visit our LIN page for more information.
Other automotive interfaces are under development. Contact us if you want more information!
A clipping circuit to limit the voltage of input signals coming from an antenna pin. The clipping voltage can be selected (currently 2 options) or disabled.
The circuit is product proven for NFC applications in TSMC 65nm, but can be ported to any desired process.
For more information, visit our site.
A Power-on-Reset circuit with a higher discrimination factor between power up and disturbances, to minimize unintentional reset during normal operation. For more information, visit our site.
Need IP for radiation hard applications? Sofics has IP blocks product proven proven for aerospace applications.
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As ESD (especially CDM) causes interdomain interfaces to fail, Sofics offers level shifters with a high ESD tolerance to mitigate any CDM risk before tape-out!
or more information, please visit our site.
