Yield estimation is an art and it depends upon many parameters that affect the yield and not to forget the Die Per Wafer (DPW). E.g.
– Design complexity, test coverage and test limits, Packaging specifications …etc.
– Edge exclusion zone 0, 3 or 6 mm -> 31415, 29.559, and 27,759 sqmm/wafer (8″ wafer), 80um-100um scribeline, test structures, e.g.
The simple prediction is the thumb rule: 99%-area in mm2 = 99%-8.4 = 90.6%. Do not use this for very small or very large dies.
Another approch is to list the flow and add the individuel percentages:
Wafer mfg. -> Wafer Level Test -> Packaging -> Component Level test -> T&R
100% -> 75% -> 96% -> 96% -> 99,99%
The figures above is for a product where the WLT yield is low compared to the packaging price – therefore the WLT is reuired.
Best regards
Henrik
