Published Date: February 13, 2026
Qualcomm, Santa Clara, CA
Job Description:
Qualcomm Technologies, Inc. is seeking a member for its DTECH Methodology team within the Engineering Group. This role focuses on enabling a state-of-the-art design analytics platform that significantly impacts the power, performance, area, and quality of Qualcomm’s products. The DTECH team is integral to the Global SOC organization, specializing in STA methodology, foundry technology, design automation, and low power architecture.
Responsibilities:
- Collaborate with core and SOC teams to develop and enhance design analytics platforms.
- Utilize static timing analysis (STA) tools to ensure design integrity and performance.
- Engage in design analysis and optimization to improve product quality.
- Contribute to the development of low power architecture and foundation IP.
Qualifications:
- M.S/Ph.D. in Electrical Engineering or Computer Science with relevant experience in ASIC/VLSI design tools and flows.
- Bachelor's degree in Science, Engineering, or related field with 4+ years of relevant experience; or Master's with 3+ years; or PhD with 2+ years.
Skills:
- Strong programming skills in Python.
- Hands-on experience with STA tools like PrimeTime and Tempus.
- Critical thinking and problem-solving abilities.
- Familiarity with GenAI models and their real-world applications.
- Experience with version control tools such as Perforce or Git.
- Understanding of ASIC RTL-GDSII design flow.
