Jobs Archive

Senior EDA/CAD Engineer [ASIC]

Spanidea Inc
San Jose, CA

Overview: We are seeking an experienced IC CAD/Design Methodology Engineer to manage and optimize advanced foundry PDKs for cutting-edge FinFET technologies. This role involves developing and supporting Cadence-based design flows, establishing verification methodologies, and driving automation to enhance design productivity.

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Senior EDA/CAD Engineer [ASIC]

Spanidea Inc
San Jose, CA

Overview: We are seeking an experienced IC CAD/Design Methodology Engineer to manage and optimize advanced foundry PDKs for cutting-edge FinFET technologies. The ideal candidate will have a strong background in semiconductor design and a proven track record in supporting advanced-node processes. This role involves collaboration with design teams and EDA vendors to enhance methodologies and improve design productivity.

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ASIC Verification Engineer [Remote]

ASIC North, Inc.
Remote

Overview: ASIC North, Inc. is seeking an experienced Full-Time ASIC Verification Engineer to join their innovative team. The company collaborates with leading high-tech firms to develop next-generation products and has consistently been recognized as a top workplace. This remote position offers competitive salaries and a comprehensive benefits package.

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ASIC Design Verification Engineer, TPU Cloud Compute

Google
Sunnyvale, CA

Overview: Join Google as an ASIC Design Verification Engineer, where you'll play a pivotal role in shaping the future of AI/ML hardware acceleration. This position focuses on developing cutting-edge TPU technology that powers Google's most demanding applications, contributing to innovative silicon solutions that impact millions worldwide.

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Sr. ASIC Design Verification Engineer, Amazon Leo

Amazon Kuiper Manufacturing Enterprises LLC
San Diego, CA

Overview: Amazon Leo is developing a low Earth orbit satellite network aimed at providing reliable internet connectivity to underserved areas. The role involves working on digital chip SOCs for communication systems, focusing on innovative wireless solutions without legacy constraints.

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ASIC Power Engineer, ML Accelerators

Google
Sunnyvale, CA

Overview: Join Google's AI and Infrastructure team as an ASIC Design Engineer, focusing on the development of cutting-edge TPU technology that powers AI/ML applications. This role involves enhancing power efficiency in silicon design, contributing to innovative solutions that impact millions of users worldwide.

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