Jobs Archive

DFT Engineer – Semiconductor / ASIC / SoC

Overview: We are seeking a skilled DFT Engineer with over 5 years of experience in Design-for-Test (DFT) for semiconductor ASIC/SoC designs. The position is based in the Bay Area, California, and requires onsite work from day one. The role involves collaboration with various engineering teams to enhance DFT methodologies and improve test coverage.

Lead ASIC Design Engineer

Overview:

{“overview”:”MITRE is a nonprofit organization dedicated to advancing national security, cybersecurity, health, transportation, and citizen services through engineering and applied research. The Electronic Systems Development Department is seeking skilled ASIC engineers to tackle complex technical challenges and contribute to innovative solutions that support critical government missions.”,”responsibilities”:[“Architect and develop highly integrated, low-SWaP-C ASIC and FPGA solutions.”,”Lead the design, integration, bring-up, and testing of custom hardware prototypes.”,”Drive development efforts across ASIC and FPGA technologies throughout the design lifecycle, including requirements definition, architecture, design, verification, testing, and concept demonstration.”,”Implement and optimize advanced algorithms in hardware and software on embedded platforms.”,”Lead project teams and mentor junior engineers.”,”Interface with sponsors and build relationships for future programs and tasks.”,”Evaluate and incorporate emerging technologies into next-generation prototype systems.”],”qualifications”:[“Minimum of 8 years of related experience with a Bachelor’s degree in electrical engineering, computer engineering, or a related field, or 6 years with a Master’s degree.”,”Experience in one or more RTL languages, including VHDL, Verilog, and/or SystemVerilog.”,”Experience leading RTL design, simulation, synthesis, timing closure, and verification methodologies.”,”Hands-on experience with EDA tool suites from industry leaders such as Cadence, Synopsys, and Siemens.”,”Experience designing and deploying ASICs on advanced semiconductor process nodes (<16nm).","Experience developing and integrating complex embedded hardware systems.","Deep understanding of best practices for design, verification, test, and deployment.","Experience integrating third-party IP into ASICs.","Proficiency with scripting and automation tools such as Python, TCL, CMake, or similar.","Experience leading technical efforts and small engineering teams.","Excellent written and verbal communication skills.","Experience working with semiconductor fabrication partners, EDA vendors, and third-party IP providers."],"skills":["Strong understanding of semiconductor technologies and design methodologies.","Ability to work collaboratively in a multidisciplinary team environment.","Proficient in project management and technical leadership.","Effective communication and relationship-building skills with sponsors and stakeholders."]}

ASIC Design Engineer

Overview: Positron AI is at the forefront of developing custom hardware systems designed to enhance AI inference capabilities, offering superior performance and efficiency compared to traditional GPU systems. The company is dedicated to creating the best AI inference systems globally.

Mid-End ASIC Engineer, Senior

Overview: Positron AI is a leader in developing custom hardware systems designed to enhance AI inference performance and efficiency. We are seeking a Senior Mid-End ASIC Engineer to take charge of synthesis, timing convergence, and logical design quality for our AI accelerator roadmap. This role requires a hands-on approach to transform high-quality RTL into implementation-ready netlists while ensuring effective collaboration across various engineering teams.

ASIC Design Verification Engineer

Overview: Positron AI is a leading company focused on developing custom hardware systems to enhance AI inference capabilities, offering superior performance and efficiency compared to traditional GPU systems. We are seeking an ASIC Design Verification Engineer to ensure the functional correctness and performance of our AI inference ASICs, contributing to the advancement of AI hardware technology.

ASIC Floorplan Design Engineer – New College Grad 2026

Overview: NVIDIA is seeking a talented ASIC Floorplan Design Engineer, specifically targeting new college graduates, to contribute to the design and implementation of cutting-edge SoCs and GPUs. This role offers a unique opportunity to influence the development of next-generation technology across various product lines, including consumer graphics, self-driving cars, and artificial intelligence. Join a global team dedicated to pushing the boundaries of computing.