Sr. FPGA Modem and Physical Layer Development Engineer, Amazon Leo

We are seeking a skilled FPGA Design Engineer to create high-performance FPGA solutions for next-generation modem systems from LEO satellites. This role involves defining and implementing a state-of-the-art wireless communication system focused on ultra-reliable low-latency and high-throughput physical layer (PHY) solutions. The engineer will collaborate with systems teams to develop and release FPGA-based signal processing and modem solutions using modern design methodologies.

Responsibilities:

• Design and implement a wireless modem on an ARM/FPGA system-on-chip platform.
• Develop RTL code through the full development lifecycle, including system architecture definition, RTL design, physical implementation, timing closure, and simulation validation.
• Collaborate with Digital Communications and RF system architects to implement complex logic functions such as signal detection, synchronization, channel coding, beamforming, and massive MIMO processing.
• Work with HW, FW, and SW teams to test integrated systems combining FPGA, RF front-ends, and networking stacks.
• Conduct trade-off analysis to optimize FPGA resources for cost, size, power, and performance to meet stringent 5G latency and throughput requirements.
• Perform lab-based silicon validation to ensure modem performance meets throughput and reliability metrics.

Qualifications:

• Bachelor's degree or above in electrical engineering, computer engineering, or equivalent.
• 7+ years of experience in FPGA design and implementation using System Verilog/Verilog/VHDL.
• Experience with modern ASIC/FPGA design and verification tools.
• Hands-on experience with Xilinx/AMD or Intel/Altera FPGAs.
• Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs.

Skills:

• Experience in embedded development in C/C++ or writing low-level drivers.
• Familiarity with Physical Layer designs for wireless modems on ARM/FPGA SoCs.
• Experience developing test venue software and hardware infrastructure for hardware-in-the-loop (HIL) testing environment.
• Proven track record of successfully fielding and supporting complex FPGA or ASIC-based wireless products.