Once an electrical failure has been localized inside an integrated circuit, the next challenge is determining what physically went wrong. Was a metal interconnect broken? Did a via fail? Is there contamination between two structures? Has a dielectric layer broken down? Is a transistor structure abnormal? Or did the failure originate in the package rather than in the silicon?
Answering these questions is the purpose of Physical Failure Analysis (PFA).
Physical Failure Analysis uses microscopy, sample preparation, cross-sectioning and materials-analysis techniques to examine the actual physical structure of a failed semiconductor device. Common tools include optical microscopy, Scanning Electron Microscopy (SEM), Focused Ion Beam (FIB), Energy Dispersive X-ray Spectroscopy (EDS/EDX) and Transmission Electron Microscopy (TEM).
SEM is widely used in semiconductor defect and failure analysis, while modern FIB-SEM systems allow engineers to expose buried structures and prepare highly localized samples for further analysis. The ultimate objective is not simply to obtain a high-resolution image of a defect. The objective is to connect the physical evidence with the electrical failure and determine the failure mechanism and root cause. For an overview of the complete subject, see:
Semiconductor Failure Analysis: The Complete Guide to IC Failure Analysis
For the electrical-analysis side of the investigation, see:
Electrical Failure Analysis (EFA) of Integrated Circuits
Physical Failure Analysis is the investigation of the physical structures and materials associated with a semiconductor failure.
The analysis may examine:
Physical analysis usually follows some level of electrical characterization or defect localization. That sequence is important because a modern semiconductor device may contain an enormous number of structures. Engineers generally want to determine where the failure is located before beginning destructive analysis. A simplified process looks like:
Electrical failure
↓
Electrical Failure Analysis
↓
Fault localization
↓
Region of interest identified
↓
Sample preparation
↓
Physical Failure Analysis
↓
Physical defect identified
↓
Failure mechanism
↓
Root cause
For the complete workflow, see: Semiconductor Failure Analysis Process: From Failure to Root Cause
Electrical Failure Analysis and Physical Failure Analysis play different but complementary roles.
EFA focuses on the electrical behavior of the device.
It may investigate:
Techniques such as EMMI, OBIRCH, thermal analysis and nanoprobing can help narrow the problem to a particular region.
PFA investigates the actual physical structure in that region.
It may reveal:
An effective investigation therefore often moves from:
EFA: Where is the failure?
to:
PFA: What physically failed there?
and finally:
Root-cause analysis: Why did it fail?
PFA may be required for many different semiconductor problems. Typical examples include:
PFA may be performed on:
The exact analysis method depends on both the device architecture and the suspected failure.
| Suspected Defect | Typical PFA Techniques | What the Analysis May Reveal |
|---|---|---|
| Metal short or open | SEM, FIB cross-section | Bridge, break, void or damaged interconnect |
| Via or contact defect | FIB + SEM | Incomplete contact, void, misalignment or structural abnormality |
| Foreign particle | SEM + EDS/EDX | Particle morphology and elemental composition |
| Die crack | Optical microscopy, SEM, cross-section | Crack location, extent and propagation |
| Package delamination | SAM, cross-section | Separation at package interfaces |
| Bond-wire damage | Optical microscopy, X-ray, SEM | Broken wire, damaged bond or interface abnormality |
| Die-attach defect | SAM, X-ray, cross-section | Voids, separation or die-attach interface problem |
| Nanoscale transistor defect | FIB + TEM | Detailed transistor, interface or structural defect |
| Crystal or interface defect | TEM | Nanoscale structural or interface information |
| Buried interconnect defect | FIB + SEM | Internal metal, via or contact abnormality |
| Contamination or corrosion | SEM + EDS/EDX | Surface morphology and elemental information |
| Unknown localized physical defect | FIB-SEM followed by TEM if required | Progressive structural characterization of the defect |
The correct method depends on what has already been learned during electrical analysis and fault localization.
Physical analysis should ideally begin with a clearly defined Region of Interest (ROI).
This might already have been identified using:
Suppose EMMI identifies one small region associated with abnormal leakage. Rather than cross-sectioning random parts of the die, the PFA engineer can target that exact location. This is particularly important for advanced semiconductor devices where defects may be extremely small and deeply buried.
Before physical sample preparation begins, engineers should consider whether the planned analysis could destroy important evidence.
Examples of invasive or destructive steps include:
Once material has been removed, the original structure cannot simply be restored. This makes the sequence of analysis important. Non-destructive techniques such as external visual inspection, X-ray or acoustic microscopy may therefore be completed before destructive PFA begins when they are relevant to the suspected failure.
For packaged semiconductor devices, the die may first need to be exposed. This process is known as decapsulation or decapping. The objective is to remove enough package material to provide access to the semiconductor die while minimizing damage to the structures being investigated.
After decapsulation, engineers may inspect:
Decapsulation is an important sample-preparation step, but it must be performed carefully because the preparation itself can create artifacts. For example, damage introduced during sample preparation could potentially be mistaken for the original device failure.
Read more:
IC Decapsulation: Methods, Process and Applications
Optical microscopy is often the first physical imaging technique used once the relevant surface is accessible.
It can identify relatively large defects such as:
Optical microscopy has several advantages:
However, its resolution is limited compared with electron microscopy. As semiconductor structures become smaller, many important defects cannot be adequately characterized using conventional optical microscopy alone. This is where SEM becomes important.
Scanning Electron Microscopy, or SEM, is one of the core tools used in semiconductor Physical Failure Analysis. An SEM scans the specimen with a focused electron beam and produces high-resolution images of surfaces and prepared cross-sections.
SEM can help investigate:
Consider an IC suspected of having an interconnect failure. After the suspected region has been exposed, SEM may reveal:
However, SEM imaging alone may not identify what an unusual particle or material is made from. For that, additional techniques such as EDS/EDX may be required.
Read more:
SEM Analysis for Semiconductor Failure Analysis
Many important semiconductor structures are buried below the surface. Simply viewing the top of the die with SEM may therefore not reveal the failure. Focused Ion Beam, or FIB, solves this problem by allowing engineers to remove material from a precisely selected location.
FIB applications in semiconductor PFA include:
AnySilicon already has further information about the technology:
and
Modern failure-analysis equipment frequently combines Focused Ion Beam milling and Scanning Electron Microscopy in one instrument. This is commonly called FIB-SEM.
The FIB removes material. The SEM images the resulting structure. This combination allows engineers to perform a controlled sequence:
Mill
↓
Image
↓
Mill further
↓
Image again
↓
Stop when the defect is exposed
FIB-SEM instruments have become important elements of advanced semiconductor FA workflows, including cross-sectional imaging, delayering and TEM sample preparation. This approach is particularly useful when the failure location has already been precisely identified by EFA.
Some semiconductor defects can only be understood when the device is viewed from the side rather than from the surface. A cross-section exposes the internal stack of the semiconductor or package.
Cross-sectional analysis can investigate:
Cross-sections may be prepared mechanically or using FIB, depending on the size of the target and the precision required.
Mechanical preparation can be appropriate when the region of interest is comparatively large.
Typical examples include:
FIB is better suited to highly localized targets because material can be removed from a precisely selected region. For example, if electrical analysis has identified one specific via, FIB can create a cross-section directly through that via.
This can significantly increase the probability of exposing the actual defect.
Integrated circuits contain multiple layers of dielectric and conductive material. A suspected defect may be located beneath several interconnect layers. Delayering, also called deprocessing, removes these layers sequentially to expose deeper semiconductor structures.
Delayering may be performed using combinations of:
The challenge is to remove one region or layer without unnecessarily damaging the structure that needs to be inspected. Modern 3D device structures and increasing numbers of wiring layers make controlled delayering increasingly important for advanced failure analysis.
Imagine that SEM reveals a suspicious particle next to an interconnect. The image tells the analyst: There is something unusual here. But not necessarily: What is it? This is where Energy Dispersive X-ray Spectroscopy, usually abbreviated EDS or EDX, becomes useful. EDS is commonly integrated with SEM and provides elemental information about the region being examined.
It can be useful when investigating:
A typical investigation may look like:
SEM identifies particle
↓
EDS determines which elements are present
↓
Process history is reviewed
↓
Possible contamination source is investigated
EDS results should not automatically be interpreted as proof of root cause. Elemental analysis tells engineers which elements are detected in a region. Additional evidence may be required to establish:
Read more:
EDS/EDX Analysis in Semiconductor Failure Analysis
For some failures, even SEM does not provide enough structural detail. Transmission Electron Microscopy, or TEM, is used when extremely high-resolution characterization is required. TEM can help investigate:
TEM requires an extremely thin specimen through which electrons can pass. For semiconductor failure analysis, the most important challenge is often preparing that sample from exactly the correct defect location. This is a major application of FIB.
A typical workflow is:
EFA identifies failing device
↓
Fault localization identifies region
↓
FIB exposes the target
↓
FIB prepares thin TEM lamella
↓
TEM examines structure
Read more:
TEM Analysis of Semiconductor Devices
TEM provides extremely detailed information, but analyzing the wrong transistor or via at very high resolution is not useful. Accurate localization therefore comes first. The progression may be:
Electrical Failure Analysis
↓
Nanoprobing / fault localization
↓
Specific transistor identified
↓
FIB sample preparation
↓
TEM
↓
Physical defect characterized
This combination is particularly important for highly scaled semiconductor technologies.
Not every semiconductor failure originates inside the silicon. Many problems occur in the package. Potential package-related defects include:
Package-level analysis may combine:
Physical inspection may reveal:
X-ray can provide non-destructive information before the package is opened, while optical microscopy and SEM can provide more detailed analysis after access is available.
Die-attach problems may involve:
Acoustic microscopy and X-ray may initially identify suspicious regions, followed by cross-sectioning and microscopy when required.
Delamination is a separation at an interface between package materials. Scanning Acoustic Microscopy can be particularly useful for detecting these internal interface abnormalities before destructive cross-sectioning. Future AnySilicon articles can cover these package-specific failure mechanisms individually.
Once the package has been ruled out or the die has been exposed, PFA may focus directly on semiconductor circuitry.
Typical targets include:
Depending on the defect size and depth, analysis may progress through:
Optical microscopy
↓
SEM
↓
FIB-SEM
↓
TEM
Not every investigation requires every technique. The goal is to use only the level of analysis necessary to identify and understand the defect.
Physical Failure Analysis can reveal many types of abnormalities.
A metal interconnect may lose electrical continuity because of:
SEM and FIB cross-sectioning can help characterize the physical discontinuity.
Two structures that should be electrically isolated may become physically connected.
A bridge may involve:
SEM can reveal the bridge, while EDS may help characterize suspicious foreign material.
Vias and contacts electrically connect different semiconductor structures.
PFA can identify abnormalities involving:
FIB cross-sectioning is particularly useful because the target via or contact can be exposed directly.
Cracks may occur within:
The appropriate analysis technique depends on the scale and location of the crack.
Voids may occur in:
Physical cross-sectioning can reveal the size and location of the void.
Foreign material can produce:
SEM-EDS can combine structural imaging with local elemental information.
Advanced semiconductor structures depend on many precisely controlled interfaces. Extremely small interface abnormalities may require FIB sample preparation followed by TEM analysis.
Consider an IC with an electrically localized open circuit.
Electrical testing confirms the open connection.
Electrical probing narrows the failure to a specific interconnect region.
FIB is used to create a cross-section through the suspected metal line.
SEM reveals a void interrupting the metal connection.
The structure and surrounding materials are examined for evidence explaining how the void developed.
The physical finding is compared with:
The important point is that seeing the void does not automatically identify why the void formed.
That final step requires correlation with the broader failure evidence.
Consider a device showing unexpected leakage.
EFA localizes the failure to one region.
The die is exposed.
SEM examination identifies a foreign particle between nearby structures.
EDS is performed on the particle.
The elemental composition is compared with materials used during fabrication or assembly.
Manufacturing data are reviewed to identify a potential contamination source.
In this example:
Electrical leakage = failure symptom
Foreign particle = physical defect
Conductive path = possible failure mechanism
Process contamination source = possible root cause
Each conclusion requires supporting evidence.
A more advanced investigation could involve:
Device-level electrical behavior is characterized.
The abnormal circuit region is identified.
An individual transistor with abnormal characteristics is identified.
A site-specific sample is prepared at that transistor.
The transistor structure is examined at very high resolution.
This illustrates why modern semiconductor PFA depends heavily on accurate localization before high-resolution physical analysis.
Advanced semiconductor architectures introduce additional PFA challenges.
Examples include:
More three-dimensional architectures can make buried defects more difficult to access and characterize.
Physical analysis may therefore require combinations of:
Physical Failure Analysis often involves techniques that alter the sample.
This is why engineers distinguish between non-destructive and destructive analysis.
The analysis sequence should therefore be planned carefully.
A destructive method can provide extremely valuable information, but only if the correct location is analyzed.
This distinction is critical. Suppose SEM finds a burned metal structure. That is a physical observation. Further investigation indicates that excessive current caused the metal damage. That may establish the failure mechanism.
But why was excessive current present?
Possible root causes might involve:
Similarly:
PFA finding: Cracked solder joint
does not automatically equal:
Root cause: Manufacturing problem
The crack might have resulted from thermal cycling, mechanical stress, material selection or another cause. PFA provides important physical evidence. Root-cause analysis must combine that evidence with electrical, manufacturing, design and application information.
A useful Physical Failure Analysis report should clearly distinguish facts from interpretation.
Depending on the investigation, it may include:
Images should ideally identify exactly where the analyzed region is located relative to the larger device.
Physical analysis without a defined target can waste time and valuable samples.
Decapsulation, polishing, delayering and FIB milling can create artifacts if not carefully controlled.
Semiconductor devices may contain harmless process variation.
An unusual physical feature should be correlated with electrical evidence.
A void, crack or bridge describes what was observed.
It does not automatically explain why that defect developed.
Some defects are too small or structurally complex to resolve adequately using SEM.
TEM provides very high-resolution information, but only from the tiny sample that has been prepared.
Accurate defect localization and FIB preparation are therefore critical.
Not every electrical failure originates in the transistor circuitry.
The package, bond structure, substrate, die attach and solder connections can also fail.
The right laboratory depends on the type of semiconductor device and the suspected defect.
Important capabilities may include:
For advanced-node semiconductor failures, the ability to combine electrical localization, FIB sample preparation and TEM analysis can be particularly important.
Read more:
How to Choose a Semiconductor Failure Analysis Lab
PFA stands for Physical Failure Analysis.
It is the physical examination of a semiconductor device to identify structural, material or packaging defects associated with a failure.
Electrical Failure Analysis characterizes the device electrically and helps determine where the failure is located.
Physical Failure Analysis examines that region to determine what physical defect is present.
Common PFA techniques include:
Additional techniques may be used depending on the device and failure.
Yes.
FIB precisely removes material from a selected location.
It can be used for:
SEM is primarily used to image surfaces and cross-sectional structures at high resolution. TEM transmits electrons through an extremely thin sample and can provide significantly more detailed information about nanoscale structures and interfaces. FIB is commonly used to prepare site-specific semiconductor samples for TEM analysis.
EDS/EDX provides elemental information from a selected region and is frequently combined with SEM.
It is particularly useful for investigating foreign material, particles, contamination and corrosion-related features.
Many important PFA methods are destructive or invasive. Cross-sectioning, FIB milling, delayering and TEM sample preparation physically modify the device. For this reason, non-destructive and electrical analysis are generally considered before destructive analysis when appropriate.
Physical Failure Analysis is most effective when it is not treated as an isolated microscopy exercise. It is part of a larger investigation. A successful semiconductor FA workflow may progress like this:
Device fails
↓
Electrical failure is reproduced
↓
EFA characterizes the electrical behavior
↓
Fault localization identifies the region
↓
PFA exposes the region
↓
SEM/FIB/TEM characterize the defect
↓
Materials analysis provides additional evidence
↓
Failure mechanism is determined
↓
Root cause is established
The power of PFA lies in converting an invisible electrical problem into observable physical evidence. But the final goal is not simply to see the defect. It is to understand why the semiconductor device failed and how the same failure can be prevented in the future.
If you have a failed IC, semiconductor device, wafer or package requiring physical analysis, AnySilicon can help connect you with companies providing semiconductor Physical Failure Analysis services.
Typical capabilities may include:
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