Get the semiconductor daily news directly to you by subscribing to our email list. For ASIC designer and managers, staying updated with the latest news, technologies, and trends is crucial. Here are the lastest news from the semiconductor industry.
The semiconductor IP market has undergone significant transformation over the past two decades. Sales volumes have surged, particularly in the digital domain, where workflows have matured into well-structured, repeatable processes. In contrast, analog IP continues to present complex challenges. It remains a less standardized segment, where both developers and customers
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Kaiserslautern, Germany – July 31, 2025 – Creonic GmbH, the leading provider of cutting-edge communications IP cores, announces the release of Version 6.0 of its DVB-S2X Demodulator IP core. This major update introduces powerful enhancements that expand the configurability and technical performance of one of Creonic’s most mature and widely
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Welcome to Fabless Boost—the ultimate package designed to supercharge your fabless semiconductor company. Harness the combined power of HardwareBee’s marketplace visibility and AnySilicon’s sourcing expertise to accelerate your IC development, marketing, and partnerships. Whether you’re launching a breakthrough chip or scaling production, Fabless Boost gives you the tools, connections, and
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BLOOMINGTON, Minn. – June 29, 2025 – SkyWater Technology (NASDAQ: SKYT), the trusted technology realization partner, today announced a license agreement with Infineon Technologies, granting access to a robust library of silicon-proven, mixed-signal ASIC design IP.
This new IP enables customers to design and build high-reliability mixed-signal SoCs entirely within a secure
SANTA CLARA, Calif., July 29, 2025 — Silvaco Group, Inc. (“Silvaco”) (NASDAQ: SVCO), a provider of TCAD, EDA software, and SIP solutions that enable semiconductor design and digital twin modeling through AI software and innovation, today announced that it has entered into a definitive agreement to acquire Mixel Group, Inc.
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Designing an ASIC/Chip is a complex engineering challenge that requires careful planning and accurate estimation of the final chip size. As process nodes continue to shrink and foundry technologies diversify, having a reliable chip size calculator can save time, reduce risk, and streamline the design process. Our free online ASIC
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Woodcliff Lake, New Jersey — June 27, 2025 — Semiconductor intellectual property core provider CAST today announced a new IP core that provides lossless data compression using either the LZ4 or the Snappy algorithms. It joins CAST’s existing LZ4 and Snappy decompression IP core to provide what the company believes
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Shanghai, China — June 26, 2025 — VeriSilicon (688521.SH) today released the ZSP5000 Digital Signal Processing (DSP) series IPs, which are based on its fifth-generation silicon-proven DSP architecture. This product line adopts a highly scalable and energy-efficient design, and has been deeply optimized for compute-intensive workloads such as computer vision and
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CAMPBELL, Calif., Jun. 26, 2025 – In a market fueled by the compute demands of AI, Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP for accelerating system-on-chip (SoC) creation, today announced that it has won the “AI Engineering Innovation Award” at the 8th annual AI Breakthrough Awards conducted by the market intelligence organization AI
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