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One-Time Programable Memory (OTP) IP Core

January 03, 2020, anysilicon

OTP memory IP stands for One Time Programmable memory IP. It is a non-volatile memory and similar to PROM or Programmable Read Only Memory, One Time Programmable memory can only be programmed once. Once it has been programmed or blown, it cannot be modified. The implementation or blowing out of the design is done through the application of a very high voltage which burns the fuses at the interconnects and causes them to melt and fuse permanently in the form of unmodifiable connections.

 

The contents are rendered permanent and cannot be changed. These are, however, more flexible than Read Only Memories, or ROMs, which can only be modified or designed at the time of manufacture. Since this kind of memory is non-volatile, it means that the memory is retained even after the power source is removed or lost. This makes it ideal for ASICs where there is a need to read data or refer to it repeatedly. Some of its common applications include boot codes, encryption keys, and parameters for the configuration of circuitry for digital, analog or sensor devices.

 

OTP devices normally comprise of traditional logic gates. The various components are connected with metal wiring and the connections are paired with fuses. Once the design has been patterned, the fuses must be blown out in order to make these connections permanent. Once the fuses have been blown, they cannot be unblown and the connections become unmodifiable. That is why this kind of memory is called a one time programmable memory as it can, quite literally, be only programmed once.

 

Click here for find companies providing OTP IP Cores.

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